LM3S5D91 Datasheet, PDF (24/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Table of Contents
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
EPI Read FIFO Alias 2 (EPIREADFIFO2), offset 0x078 .................................................... 522
EPI Read FIFO Alias 3 (EPIREADFIFO3), offset 0x07C ................................................... 522
EPI Read FIFO Alias 4 (EPIREADFIFO4), offset 0x080 .................................................... 522
EPI Read FIFO Alias 5 (EPIREADFIFO5), offset 0x084 .................................................... 522
EPI Read FIFO Alias 6 (EPIREADFIFO6), offset 0x088 .................................................... 522
EPI Read FIFO Alias 7 (EPIREADFIFO7), offset 0x08C ................................................... 522
EPI FIFO Level Selects (EPIFIFOLVL), offset 0x200 ........................................................ 523
EPI Write FIFO Count (EPIWFIFOCNT), offset 0x204 ...................................................... 525
EPI Interrupt Mask (EPIIM), offset 0x210 ......................................................................... 526
EPI Raw Interrupt Status (EPIRIS), offset 0x214 .............................................................. 527
EPI Masked Interrupt Status (EPIMIS), offset 0x218 ........................................................ 529
EPI Error and Interrupt Status and Clear (EPIEISC), offset 0x21C .................................... 530
General-Purpose Timers ............................................................................................................. 532
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 549
Register 2: GPTM Timer A Mode (GPTMTAMR), offset 0x004 ........................................................... 550
Register 3: GPTM Timer B Mode (GPTMTBMR), offset 0x008 ........................................................... 552
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 554
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 557
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 559
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 562
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 565
Register 9: GPTM Timer A Interval Load (GPTMTAILR), offset 0x028 ................................................ 567
Register 10: GPTM Timer B Interval Load (GPTMTBILR), offset 0x02C ................................................ 568
Register 11: GPTM Timer A Match (GPTMTAMATCHR), offset 0x030 .................................................. 569
Register 12: GPTM Timer B Match (GPTMTBMATCHR), offset 0x034 ................................................. 570
Register 13: GPTM Timer A Prescale (GPTMTAPR), offset 0x038 ....................................................... 571
Register 14: GPTM Timer B Prescale (GPTMTBPR), offset 0x03C ...................................................... 572
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 573
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 574
Register 17: GPTM Timer A (GPTMTAR), offset 0x048 ....................................................................... 575
Register 18: GPTM Timer B (GPTMTBR), offset 0x04C ....................................................................... 576
Register 19: GPTM Timer A Value (GPTMTAV), offset 0x050 ............................................................... 577
Register 20: GPTM Timer B Value (GPTMTBV), offset 0x054 .............................................................. 578
Watchdog Timers ......................................................................................................................... 579
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 583
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 584
Register 3: Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 585
Register 4: Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 587
Register 5: Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 588
Register 6: Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 589
Register 7: Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 590
Register 8: Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 591
Register 9: Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 592
Register 10: Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 593
Register 11: Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 594
Register 12: Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 595
Register 13: Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 596
Register 14: Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 597
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January 22, 2012
Texas Instruments-Production Data