LM3S5D91 Datasheet, PDF (3/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Stellaris^® LM3S5D91 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 39
About This Document .................................................................................................................... 42
Audience .............................................................................................................................................. 42
About This Manual ................................................................................................................................ 42
Related Documents ............................................................................................................................... 42
Documentation Conventions .................................................................................................................. 43
1
1.1
1.2
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
1.3.7
1.3.8
1.3.9
1.4
Architectural Overview .......................................................................................... 45
Overview ...................................................................................................................... 45
Target Applications ........................................................................................................ 47
Features ....................................................................................................................... 47
ARM Cortex-M3 Processor Core .................................................................................... 47
On-Chip Memory ........................................................................................................... 49
External Peripheral Interface ......................................................................................... 50
Serial Communications Peripherals ................................................................................ 52
System Integration ........................................................................................................ 57
Advanced Motion Control ............................................................................................... 61
Analog .......................................................................................................................... 63
JTAG and ARM Serial Wire Debug ................................................................................ 65
Packaging and Temperature .......................................................................................... 66
Hardware Details .......................................................................................................... 66
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
The Cortex-M3 Processor ...................................................................................... 67
Block Diagram .............................................................................................................. 68
Overview ...................................................................................................................... 69
System-Level Interface .................................................................................................. 69
Integrated Configurable Debug ...................................................................................... 69
Trace Port Interface Unit (TPIU) ..................................................................................... 70
Cortex-M3 System Component Details ........................................................................... 70
Programming Model ...................................................................................................... 71
Processor Mode and Privilege Levels for Software Execution ........................................... 71
Stacks .......................................................................................................................... 71
Register Map ................................................................................................................ 72
Register Descriptions .................................................................................................... 73
Exceptions and Interrupts .............................................................................................. 86
Data Types ................................................................................................................... 86
Memory Model .............................................................................................................. 86
Memory Regions, Types and Attributes ........................................................................... 88
Memory System Ordering of Memory Accesses .............................................................. 89
Behavior of Memory Accesses ....................................................................................... 89
Software Ordering of Memory Accesses ......................................................................... 90
Bit-Banding ................................................................................................................... 91
Data Storage ................................................................................................................ 93
Synchronization Primitives ............................................................................................. 94
Exception Model ........................................................................................................... 95
Exception States ........................................................................................................... 96
Exception Types ............................................................................................................ 96
January 22, 2012
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