LM3S5D91 Datasheet, PDF (344/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Micro Direct Memory Access (μDMA)
7.2.5
Channel Configuration
The μDMA controller uses an area of system memory to store a set of channel control structures
in a table. The control table may have one or two entries for each μDMA channel. Each entry in the
table structure contains source and destination pointers, transfer size, and transfer mode. The
control table can be located anywhere in system memory, but it must be contiguous and aligned on
a 1024-byte boundary.
Table 7-3 on page 344 shows the layout in memory of the channel control table. Each channel may
have one or two control structures in the control table: a primary control structure and an optional
alternate control structure. The table is organized so that all of the primary entries are in the first
half of the table, and all the alternate structures are in the second half of the table. The primary entry
is used for simple transfer modes where transfers can be reconfigured and restarted after each
transfer is complete. In this case, the alternate control structures are not used and therefore only
the first half of the table must be allocated in memory; the second half of the control table is not
necessary, and that memory can be used for something else. If a more complex transfer mode is
used such as ping-pong or scatter-gather, then the alternate control structure is also used and
memory space should be allocated for the entire table.
Any unused memory in the control table may be used by the application. This includes the control
structures for any channels that are unused by the application as well as the unused control word
for each channel.
Table 7-3. Control Structure Memory Map
Offset
0x0
0x10
...
0x1F0
0x200
0x210
...
0x3F0
Channel
0, Primary
1, Primary
...
31, Primary
0, Alternate
1, Alternate
...
31, Alternate
Table 7-4 shows an individual control structure entry in the control table. Each entry is aligned on
a 16-byte boundary. The entry contains four long words: the source end pointer, the destination end
pointer, the control word, and an unused entry. The end pointers point to the ending address of the
transfer and are inclusive. If the source or destination is non-incrementing (as for a peripheral
register), then the pointer should point to the transfer address.
Table 7-4. Channel Control Structure
Offset
0x000
0x004
0x008
0x00C
Description
Source End Pointer
Destination End Pointer
Control Word
Unused
The control word contains the following fields:
■ Source and destination data sizes
344
January 22, 2012
Texas Instruments-Production Data