LM3S5D91 Datasheet, PDF (28/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Table of Contents
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
I²S Receive Interrupt Status and Mask (I2SRXISM), offset 0x810 ..................................... 855
I²S Receive FIFO Level (I2SRXLEV), offset 0x818 ........................................................... 856
I²S Module Configuration (I2SCFG), offset 0xC00 ............................................................ 857
I²S Interrupt Mask (I2SIM), offset 0xC10 ......................................................................... 859
I²S Raw Interrupt Status (I2SRIS), offset 0xC14 ............................................................... 861
I²S Masked Interrupt Status (I2SMIS), offset 0xC18 ......................................................... 863
I²S Interrupt Clear (I2SIC), offset 0xC1C ......................................................................... 865
Controller Area Network (CAN) Module ..................................................................................... 866
Register 1: CAN Control (CANCTL), offset 0x000 ............................................................................. 888
Register 2: CAN Status (CANSTS), offset 0x004 ............................................................................... 890
Register 3: CAN Error Counter (CANERR), offset 0x008 ................................................................... 893
Register 4: CAN Bit Timing (CANBIT), offset 0x00C .......................................................................... 894
Register 5: CAN Interrupt (CANINT), offset 0x010 ............................................................................. 895
Register 6: CAN Test (CANTST), offset 0x014 .................................................................................. 896
Register 7: CAN Baud Rate Prescaler Extension (CANBRPE), offset 0x018 ....................................... 898
Register 8: CAN IF1 Command Request (CANIF1CRQ), offset 0x020 ................................................ 899
Register 9: CAN IF2 Command Request (CANIF2CRQ), offset 0x080 ................................................ 899
Register 10: CAN IF1 Command Mask (CANIF1CMSK), offset 0x024 .................................................. 900
Register 11: CAN IF2 Command Mask (CANIF2CMSK), offset 0x084 .................................................. 900
Register 12: CAN IF1 Mask 1 (CANIF1MSK1), offset 0x028 ................................................................ 903
Register 13: CAN IF2 Mask 1 (CANIF2MSK1), offset 0x088 ................................................................ 903
Register 14: CAN IF1 Mask 2 (CANIF1MSK2), offset 0x02C ................................................................ 904
Register 15: CAN IF2 Mask 2 (CANIF2MSK2), offset 0x08C ................................................................ 904
Register 16: CAN IF1 Arbitration 1 (CANIF1ARB1), offset 0x030 ......................................................... 906
Register 17: CAN IF2 Arbitration 1 (CANIF2ARB1), offset 0x090 ......................................................... 906
Register 18: CAN IF1 Arbitration 2 (CANIF1ARB2), offset 0x034 ......................................................... 907
Register 19: CAN IF2 Arbitration 2 (CANIF2ARB2), offset 0x094 ......................................................... 907
Register 20: CAN IF1 Message Control (CANIF1MCTL), offset 0x038 .................................................. 909
Register 21: CAN IF2 Message Control (CANIF2MCTL), offset 0x098 .................................................. 909
Register 22: CAN IF1 Data A1 (CANIF1DA1), offset 0x03C ................................................................. 912
Register 23: CAN IF1 Data A2 (CANIF1DA2), offset 0x040 ................................................................. 912
Register 24: CAN IF1 Data B1 (CANIF1DB1), offset 0x044 ................................................................. 912
Register 25: CAN IF1 Data B2 (CANIF1DB2), offset 0x048 ................................................................. 912
Register 26: CAN IF2 Data A1 (CANIF2DA1), offset 0x09C ................................................................. 912
Register 27: CAN IF2 Data A2 (CANIF2DA2), offset 0x0A0 ................................................................. 912
Register 28: CAN IF2 Data B1 (CANIF2DB1), offset 0x0A4 ................................................................. 912
Register 29: CAN IF2 Data B2 (CANIF2DB2), offset 0x0A8 ................................................................. 912
Register 30: CAN Transmission Request 1 (CANTXRQ1), offset 0x100 ................................................ 913
Register 31: CAN Transmission Request 2 (CANTXRQ2), offset 0x104 ................................................ 913
Register 32: CAN New Data 1 (CANNWDA1), offset 0x120 ................................................................. 914
Register 33: CAN New Data 2 (CANNWDA2), offset 0x124 ................................................................. 914
Register 34: CAN Message 1 Interrupt Pending (CANMSG1INT), offset 0x140 ..................................... 915
Register 35: CAN Message 2 Interrupt Pending (CANMSG2INT), offset 0x144 ..................................... 915
Register 36: CAN Message 1 Valid (CANMSG1VAL), offset 0x160 ....................................................... 916
Register 37: CAN Message 2 Valid (CANMSG2VAL), offset 0x164 ....................................................... 916
Universal Serial Bus (USB) Controller ....................................................................................... 917
Register 1: USB Device Functional Address (USBFADDR), offset 0x000 ............................................ 945
Register 2: USB Power (USBPOWER), offset 0x001 ......................................................................... 946
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January 22, 2012
Texas Instruments-Production Data