LM3S5D91 Datasheet, PDF (1194/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Signal Tables
Table 23-3. Signals by Signal Name (continued)
Pin Name
PWM4
PWM5
PWM6
PWM7
RST
SSI0Clk
SSI0Fss
SSI0Rx
SSI0Tx
SSI1Clk
SSI1Fss
SSI1Rx
SSI1Tx
SWCLK
SWDIO
SWO
TCK
TDI
TDO
TMS
U0Rx
Pin Number Pin Mux / Pin
Assignment
2
PE6 (1)
19
PG0 (4)
28
PA2 (4)
34
PA6 (5)
60
PF2 (2)
62
PH6 (10)
74
PE0 (1)
86
PH0 (9)
1
PE7 (1)
15
PH7 (10)
18
PG1 (4)
29
PA3 (4)
35
PA7 (5)
59
PF3 (2)
75
PE1 (1)
85
PH1 (9)
25
PC4 (4)
30
PA4 (4)
37
PG6 (4)
41
PG4 (9)
23
PC6 (4)
31
PA5 (4)
36
PG7 (4)
40
PG5 (8)
64
fixed
28
PA2 (1)
29
PA3 (1)
30
PA4 (1)
31
PA5 (1)
60
PF2 (9)
74
PE0 (2)
76
PH4 (11)
59
PF3 (9)
63
PH5 (11)
75
PE1 (2)
58
PF4 (9)
62
PH6 (11)
95
PE2 (2)
15
PH7 (11)
46
PF5 (9)
96
PE3 (2)
80
PC0 (3)
79
PC1 (3)
77
PC3 (3)
80
PC0 (3)
78
PC2 (3)
77
PC3 (3)
79
PC1 (3)
26
PA0 (1)
Pin Type
O
O
O
O
I
I/O
I/O
I
O
I/O
I/O
I
O
I
I/O
O
I
I
O
I
I
Buffer Type^a Description
TTL
PWM 4. This signal is controlled by PWM Generator
2.
TTL
PWM 5. This signal is controlled by PWM Generator
2.
TTL
PWM 6. This signal is controlled by PWM Generator
3.
TTL
PWM 7. This signal is controlled by PWM Generator
3.
TTL
System reset input.
TTL
SSI module 0 clock.
TTL
SSI module 0 frame.
TTL
SSI module 0 receive.
TTL
SSI module 0 transmit.
TTL
SSI module 1 clock.
TTL
SSI module 1 frame.
TTL
SSI module 1 receive.
TTL
SSI module 1 transmit.
TTL
JTAG/SWD CLK.
TTL
JTAG TMS and SWDIO.
TTL
JTAG TDO and SWO.
TTL
JTAG/SWD CLK.
TTL
JTAG TDI.
TTL
JTAG TDO and SWO.
TTL
JTAG TMS and SWDIO.
TTL
UART module 0 receive. When in IrDA mode, this
signal has IrDA modulation.
1194
Texas Instruments-Production Data
January 22, 2012