LM3S5D91 Datasheet, PDF (7/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Stellaris^® LM3S5D91 Microcontroller
13 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 685
13.1 Block Diagram ............................................................................................................ 686
13.2 Signal Description ....................................................................................................... 686
13.3 Functional Description ................................................................................................. 688
13.3.1 Transmit/Receive Logic ............................................................................................... 689
13.3.2 Baud-Rate Generation ................................................................................................. 689
13.3.3 Data Transmission ...................................................................................................... 690
13.3.4 Serial IR (SIR) ............................................................................................................. 690
13.3.5 ISO 7816 Support ....................................................................................................... 691
13.3.6 Modem Handshake Support ......................................................................................... 692
13.3.7 LIN Support ................................................................................................................ 693
13.3.8 FIFO Operation ........................................................................................................... 694
13.3.9 Interrupts .................................................................................................................... 695
13.3.10 Loopback Operation .................................................................................................... 696
13.3.11 DMA Operation ........................................................................................................... 696
13.4 Initialization and Configuration ..................................................................................... 696
13.5 Register Map .............................................................................................................. 697
13.6 Register Descriptions .................................................................................................. 699
14 Synchronous Serial Interface (SSI) .................................................................... 749
14.1 Block Diagram ............................................................................................................ 750
14.2 Signal Description ....................................................................................................... 750
14.3 Functional Description ................................................................................................. 751
14.3.1 Bit Rate Generation ..................................................................................................... 752
14.3.2 FIFO Operation ........................................................................................................... 752
14.3.3 Interrupts .................................................................................................................... 752
14.3.4 Frame Formats ........................................................................................................... 753
14.3.5 DMA Operation ........................................................................................................... 760
14.4 Initialization and Configuration ..................................................................................... 761
14.5 Register Map .............................................................................................................. 762
14.6 Register Descriptions .................................................................................................. 763
15 Inter-Integrated Circuit (I²C) Interface ................................................................ 791
15.1 Block Diagram ............................................................................................................ 792
15.2 Signal Description ....................................................................................................... 792
15.3 Functional Description ................................................................................................. 793
15.3.1 I²C Bus Functional Overview ........................................................................................ 793
15.3.2 Available Speed Modes ............................................................................................... 795
15.3.3 Interrupts .................................................................................................................... 796
15.3.4 Loopback Operation .................................................................................................... 797
15.3.5 Command Sequence Flow Charts ................................................................................ 798
15.4 Initialization and Configuration ..................................................................................... 805
15.5 Register Map .............................................................................................................. 806
15.6 Register Descriptions (I²C Master) ............................................................................... 807
15.7 Register Descriptions (I²C Slave) ................................................................................. 820
16 Inter-Integrated Circuit Sound (I²S) Interface .................................................... 829
16.1 Block Diagram ............................................................................................................ 830
16.2 Signal Description ....................................................................................................... 830
16.3 Functional Description ................................................................................................. 832
January 22, 2012
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