LM3S5D91 Datasheet, PDF (23/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Stellaris^® LM3S5D91 Microcontroller
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GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 422
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 424
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 425
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 427
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 428
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 429
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 430
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 431
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 433
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 435
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 436
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 438
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 439
GPIO Analog Mode Select (GPIOAMSEL), offset 0x528 ................................................... 441
GPIO Port Control (GPIOPCTL), offset 0x52C ................................................................. 443
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 445
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 446
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 447
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 448
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 449
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 450
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 451
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 452
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 453
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 454
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 455
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 456
External Peripheral Interface (EPI) ............................................................................................. 457
Register 1: EPI Configuration (EPICFG), offset 0x000 ....................................................................... 489
Register 2: EPI Main Baud Rate (EPIBAUD), offset 0x004 ................................................................. 490
Register 3: EPI SDRAM Configuration (EPISDRAMCFG), offset 0x010 .............................................. 492
Register 4: EPI Host-Bus 8 Configuration (EPIHB8CFG), offset 0x010 ............................................... 494
Register 5: EPI Host-Bus 16 Configuration (EPIHB16CFG), offset 0x010 ........................................... 497
Register 6: EPI General-Purpose Configuration (EPIGPCFG), offset 0x010 ........................................ 501
Register 7: EPI Host-Bus 8 Configuration 2 (EPIHB8CFG2), offset 0x014 .......................................... 506
Register 8: EPI Host-Bus 16 Configuration 2 (EPIHB16CFG2), offset 0x014 ....................................... 509
Register 9: EPI General-Purpose Configuration 2 (EPIGPCFG2), offset 0x014 ................................... 512
Register 10: EPI Address Map (EPIADDRMAP), offset 0x01C ............................................................. 513
Register 11: EPI Read Size 0 (EPIRSIZE0), offset 0x020 .................................................................... 515
Register 12: EPI Read Size 1 (EPIRSIZE1), offset 0x030 .................................................................... 515
Register 13: EPI Read Address 0 (EPIRADDR0), offset 0x024 ............................................................ 516
Register 14: EPI Read Address 1 (EPIRADDR1), offset 0x034 ............................................................ 516
Register 15: EPI Non-Blocking Read Data 0 (EPIRPSTD0), offset 0x028 ............................................. 517
Register 16: EPI Non-Blocking Read Data 1 (EPIRPSTD1), offset 0x038 ............................................. 517
Register 17: EPI Status (EPISTAT), offset 0x060 ................................................................................ 519
Register 18: EPI Read FIFO Count (EPIRFIFOCNT), offset 0x06C ...................................................... 521
Register 19: EPI Read FIFO (EPIREADFIFO), offset 0x070 ................................................................ 522
Register 20: EPI Read FIFO Alias 1 (EPIREADFIFO1), offset 0x074 .................................................... 522
January 22, 2012
23
Texas Instruments-Production Data