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LM3S5D91 Datasheet, PDF (1191/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller
Stellaris® LM3S5D91 Microcontroller
Table 23-3. Signals by Signal Name (continued)
Pin Name
I2S0TXWS
IDX0
IDX1
LDO
Pin Number Pin Mux / Pin
Assignment
6
PE4 (9)
31
PA5 (9)
100
PD7 (8)
10
PD0 (3)
40
PG5 (4)
72
PB2 (2)
90
PB6 (5)
92
PB4 (6)
100
PD7 (1)
17
PG2 (8)
61
PF1 (2)
84
PH2 (1)
7
fixed
Pin Type
I/O
I
I
-
NC
NMI
OSC0
OSC1
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
51
fixed
-
89
PB7 (4)
I
48
fixed
I
49
fixed
O
26
-
I/O
27
-
I/O
28
-
I/O
29
-
I/O
30
-
I/O
31
-
I/O
34
-
I/O
35
-
I/O
66
-
I/O
67
-
I/O
72
-
I/O
65
-
I/O
92
-
I/O
91
-
I/O
90
-
I/O
89
-
I/O
80
-
I/O
79
-
I/O
78
-
I/O
77
-
I/O
25
-
I/O
Buffer Typea Description
TTL
I2S module 0 transmit word select.
TTL
QEI module 0 index.
TTL
QEI module 1 index.
Power
-
TTL
Analog
Analog
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDDC pins at the board level in
addition to the decoupling capacitor(s).
No connect. Leave the pin electrically
unconnected/isolated.
Non-maskable interrupt.
Main oscillator crystal input or an external clock
reference input.
Main oscillator crystal output. Leave unconnected
when using a single-ended clock source.
GPIO port A bit 0.
GPIO port A bit 1.
GPIO port A bit 2.
GPIO port A bit 3.
GPIO port A bit 4.
GPIO port A bit 5.
GPIO port A bit 6.
GPIO port A bit 7.
GPIO port B bit 0. This pin is not 5-V tolerant.
GPIO port B bit 1. This pin is not 5-V tolerant.
GPIO port B bit 2.
GPIO port B bit 3.
GPIO port B bit 4.
GPIO port B bit 5.
GPIO port B bit 6.
GPIO port B bit 7.
GPIO port C bit 0.
GPIO port C bit 1.
GPIO port C bit 2.
GPIO port C bit 3.
GPIO port C bit 4.
January 22, 2012
Texas Instruments-Production Data
1191