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LM3S5D91 Datasheet, PDF (1220/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller
Signal Tables
Table 23-7. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Typea Description
H11
RST
I
TTL
System reset input.
PF1
I/O
TTL
GPIO port F bit 1.
CAN1Tx
O
TTL
CAN module 1 transmit.
CCP3
I/O
TTL
Capture/Compare/PWM 3.
H12
I2S0TXMCLK
I/O
TTL
I2S module 0 transmit master clock.
IDX1
I
TTL
QEI module 1 index.
PWM1
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
U1RTS
O
TTL
UART module 1 Request to Send modem flow control output line.
PG2
I/O
TTL
GPIO port G bit 2.
Fault0
I
TTL
PWM Fault 0.
J1
I2S0RXSD
I/O
TTL
I2S module 0 receive data.
IDX1
I
TTL
QEI module 1 index.
PWM0
O
TTL
PWM 0. This signal is controlled by PWM Generator 0.
PG3
I/O
TTL
GPIO port G bit 3.
Fault0
I
TTL
PWM Fault 0.
J2
Fault2
I
TTL
PWM Fault 2.
I2S0RXMCLK
I/O
TTL
I2S module 0 receive master clock.
PWM1
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
J3
GND
-
Power Ground reference for logic and I/O pins.
J10
GND
-
Power Ground reference for logic and I/O pins.
PF2
I/O
TTL
GPIO port F bit 2.
PWM2
J11
PWM4
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
SSI1Clk
I/O
TTL
SSI module 1 clock.
PF3
I/O
TTL
GPIO port F bit 3.
PWM3
J12
PWM5
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
SSI1Fss
I/O
TTL
SSI module 1 frame.
PG0
I/O
TTL
GPIO port G bit 0.
EPI0S13
I2C1SCL
I/O
TTL
EPI module 0 signal 13.
I/O
OD
I2C module 1 clock.
PWM0
K1
PWM4
O
TTL
PWM 0. This signal is controlled by PWM Generator 0.
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
U2Rx
I
TTL
UART module 2 receive. When in IrDA mode, this signal has IrDA
modulation.
USB0EPEN
O
TTL
Optionally used in Host mode to control an external power source
to supply power to the USB bus.
1220
Texas Instruments-Production Data
January 22, 2012