LM3S5D91 Datasheet, PDF (110/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Cortex-M3 Peripherals
3
3.1
3.1.1
Cortex-M3 Peripherals
This chapter provides information on the Stellaris^® implementation of the Cortex-M3 processor
peripherals, including:
■ SysTick (see page 110)
Provides a simple, 24-bit clear-on-write, decrementing, wrap-on-zero counter with a flexible
control mechanism.
■ Nested Vectored Interrupt Controller (NVIC) (see page 111)
– Facilitates low-latency exception and interrupt handling
– Controls power management
– Implements system control registers
■ System Control Block (SCB) (see page 113)
Provides system implementation information and system control, including configuration, control,
and reporting of system exceptions.
■ Memory Protection Unit (MPU) (see page 113)
Supports the standard ARMv7 Protected Memory System Architecture (PMSA) model. The MPU
provides full support for protection regions, overlapping protection regions, access permissions,
and exporting memory attributes to the system.
Table 3-1 on page 110 shows the address map of the Private Peripheral Bus (PPB). Some peripheral
register regions are split into two address regions, as indicated by two addresses listed.
Table 3-1. Core Peripheral Register Regions
Address
0xE000.E010-0xE000.E01F
0xE000.E100-0xE000.E4EF
0xE000.EF00-0xE000.EF03
0xE000.E008-0xE000.E00F
0xE000.ED00-0xE000.ED3F
0xE000.ED90-0xE000.EDB8
Core Peripheral
System Timer
Nested Vectored Interrupt Controller
System Control Block
Memory Protection Unit
Description (see page ...)
110
111
113
113
Functional Description
This chapter provides information on the Stellaris implementation of the Cortex-M3 processor
peripherals: SysTick, NVIC, SCB and MPU.
System Timer (SysTick)
Cortex-M3 includes an integrated system timer, SysTick, which provides a simple, 24-bit
clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism. The counter
can be used in several different ways, for example as:
■ An RTOS tick timer that fires at a programmable rate (for example, 100 Hz) and invokes a SysTick
routine.
■ A high-speed alarm timer using the system clock.
110
January 22, 2012
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