LM3S5D91 Datasheet, PDF (484/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

External Peripheral Interface (EPI)
Figure 9-15. Read Accesses, FRM50=0, FRMCNT=0, RDCYC=1
CLOCK
(EPI0S31)
FRAME
(EPI0S30)
RD
(EPI0S29)
WR
(EPI0S28)
Address
Addr1
Addr2
Addr3
Data
Data1
Data2
Data3
FRAME Signal Operation
The operation of the FRAME signal is controlled by the FRMCNT and FRM50 bits. When FRM50 is
clear, the FRAME signal is high whenever the WR or RD strobe is high. When FRMCNT is clear, the
FRAME signal is simply the logical OR of the WR and RD strobes so the FRAME signal is high during
every read or write access, see Figure 9-16 on page 484.
Figure 9-16. FRAME Signal Operation, FRM50=0 and FRMCNT=0
Clock
(EPI0S31)
WR
(EPI0S28)
RD
(EPI0S29)
Frame
(EPI0S30)
If the FRMCNT field is 0x1, then the FRAME signal pulses high during every other read or write
access, see Figure 9-17 on page 484.
Figure 9-17. FRAME Signal Operation, FRM50=0 and FRMCNT=1
Clock
(EPI0S31)
WR
(EPI0S28)
RD
(EPI0S29)
Frame
(EPI0S30)
If the FRMCNT field is 0x2 and FRM50 is clear, then the FRAME signal pulses high during every third
access, and so on for every value of FRMCNT, see Figure 9-18 on page 485.
484
January 22, 2012
Texas Instruments-Production Data