S71PL129JC0 Datasheet, PDF (8/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory

Advance Information
Input/Output Description
Pin Description
A21–A0
=
DQ15–DQ0
=
CE1#f
=
CE2#f
=
CE1#ps
=
CE2ps
=
OE#
=
WE#
=
RY/BY#
=
UB#
=
LB#
=
RESET#
=
WP#/ACC
=
V_CCf
=
V_CCps
=
V_SS
=
NC
=
Logic Symbol
22
22 Address Inputs (Common)
16 Data Inputs/Outputs (Common)
Chip Enable 1 (Flash)
Chip Enable 2 (Flash)
Chip Enable 1 (pSRAM)
Chip Enable 2 (pSRAM)
Output Enable (Common)
Write Enable (Common)
Ready/Busy Output
Upper Byte Control (pSRAM)
Lower Byte Control (pSRAM)
Hardware Reset Pin, Active Low (Flash 1)
Hardware Write Protect/Acceleration Pin (Flash)
Flash 3.0 volt-only single power supply (see Product
Selector Guide for speed options and voltage supply
tolerances)
pSRAM Power Supply
Device Ground (Common)
Pin Not Connected Internally
A21–A0
CE1#f
16
DQ15–DQ0
CE2#f
CE1#ps
CE2ps
OE#
WE#
WP # / ACC
R Y/BY#
RE S E T #
UB#
LB#
8
S71PL129Jxx_00_A5 December 23, 2004