S71PL129JC0 Datasheet, PDF (137/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory

Advance information
AC Characteristics
Power Down Parameters
Parameter
CE2 Low Setup Time for Power Down Entry
CE2 Low Hold Time after Power Down Entry
CE1# High Hold Time following CE2 High after Power
Down Exit [SLEEP mode only]
CE1# High Hold Time following CE2 High after Power
Down Exit [not in SLEEP mode]
CE1# High Setup Time following CE2 High after Power
Down Exit
16M
32M
64M
Symbol Min. Max. Min. Max. Min. Max. Unit Note
t_CSP 10 — 10 — 10 — ns
t_C2LP 80 — 65 — 65 — ns
t_CHH 300 — 300 — 300 —
µs
1
t_CHHP
N/A
1 — 1 — µs 2
t_CHS
0
—
0
—
0
— ns
1
Notes:
1. Applicable also to power-up.
2. Applicable when 4Mb and 8Mb Partial modes are programmed.
Other Timing Parameters
16M
32M
64M
Parameter
Symbol Min. Max. Min. Max. Min. Max. Unit Note
CE1# High to OE# Invalid Time for Standby Entry
t_CHOX 10 — 10 — 10 — ns
CE1# High to WE# Invalid Time for Standby Entry
t_CHWX 10 — 10 — 10 —
ns
1
CE2 Low Hold Time after Power-up
t_C2LH 50 — 50 — 50 — µs
CE1# High Hold Time following CE2 High after Power-up t_CHH 300 — 300 — 300 — µs
Input Transition Time
t_T
1 25 1 25 1 25 ns 2
Notes:
1. Some data might be written into any address location if t_CHWX(min) is not satisfied.
2. The Input Transition Time (t_T) at AC testing is 5ns as shown in below. If actual tT is longer than 5ns, it can violate the AC
specification of some of the timing parameters.
November 2, 2004 pSRAM_Type07_13_A1
pSRAM Type 7
137