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S71PL129JC0 Datasheet, PDF (3/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory
Advance Information
S71PL129JC0/S71PL129JB0/S71PL129JA0
Distinctive Characteristics . . . . . . . . . . . . . . . . . . . 1
MCP Features ........................................................................................................ 1
General Description . . . . . . . . . . . . . . . . . . . . . . . . 1
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . .2
128 Mb Flash Memory ..........................................................................................2
MCP Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . .6
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . .7
Input/Output Description . . . . . . . . . . . . . . . . . . . 8
Pin Description ......................................................................................................8
Logic Symbol ...........................................................................................................8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . .9
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . 11
TLA064—64-ball Fine-Pitch Ball Grid Array (FBGA)
8 x 11.6 mm Package ............................................................................................ 11
S29PL129J for MCP
General Description . . . . . . . . . . . . . . . . . . . . . . . . 14
Simultaneous Read/Write Operation with Zero Latency ...................... 14
Page Mode Features ........................................................................................... 14
Standard Flash Memory Features ................................................................... 14
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 19
Table 1. PL129J Device Bus Operations ................................ 19
Requirements for Reading Array Data ......................................................... 19
Random Read (Non-Page Read) ............................................................... 20
Page Mode Read ............................................................................................. 20
Table 2. Page Select .......................................................... 20
Simultaneous Read/Write Operation .......................................................... 20
Writing Commands/Command Sequences ................................................. 21
Accelerated Program Operation ............................................................... 21
Autoselect Functions ..................................................................................... 21
Standby Mode ........................................................................................................21
Automatic Sleep Mode ..................................................................................... 22
RESET#: Hardware Reset Pin ........................................................................ 22
Output Disable Mode ....................................................................................... 22
Table 3. S29PL129J Sector Architecture ............................... 23
Table 4. Secured Silicon Sector Addresses ............................ 29
Autoselect Mode ................................................................................................ 29
Table 5. Autoselect Codes for PL129J ................................... 30
Table 6. PL129J Boot Sector/Sector Block Addresses for Protection/
Unprotection ..................................................................... 31
Selecting a Sector Protection Mode ..............................................................32
Table 7. Sector Protection Schemes ..................................... 32
Sector Protection . . . . . . . . . . . . . . . . . . . . . . . . . 32
Persistent Sector Protection ...........................................................................32
Password Sector Protection ............................................................................32
WP# Hardware Protection .............................................................................32
Selecting a Sector Protection Mode ..............................................................32
Persistent Sector Protection . . . . . . . . . . . . . . . . 33
Persistent Protection Bit (PPB) .......................................................................33
Persistent Protection Bit Lock (PPB Lock) .................................................33
Dynamic Protection Bit (DYB) .......................................................................33
Persistent Sector Protection Mode Locking Bit ........................................35
Password Protection Mode . . . . . . . . . . . . . . . . . 35
Password and Password Mode Locking Bit ................................................36
64-bit Password ...................................................................................................36
December 23, 2004 S71PL129Jxx_00_A5
Write Protect (WP#) ....................................................................................... 36
Persistent Protection Bit Lock ................................................................... 37
High Voltage Sector Protection ..................................................................... 37
Figure 1. In-System Sector Protection/Sector Unprotection
Algorithms........................................................................ 38
Temporary Sector Unprotect ........................................................................ 39
Figure 2. Temporary Sector Unprotect Operation ................... 39
Secured Silicon Sector Flash Memory Region ........................................... 39
Factory-Locked Area (64 words) ..............................................................40
Customer-Lockable Area (64 words) ......................................................40
Secured Silicon Sector Protection Bits ....................................................40
Figure 3. Secured Silicon Sector Protect Verify ...................... 41
Hardware Data Protection ..............................................................................41
Low VCC Write Inhibit .................................................................................41
Write Pulse “Glitch” Protection ................................................................ 41
Logical Inhibit ....................................................................................................41
Power-Up Write Inhibit ................................................................................ 41
Common Flash Memory Interface (CFI) . . . . . . 42
Table 8. CFI Query Identification String ................................ 42
Table 9. System Interface String ......................................... 43
Table 10. Device Geometry Definition ................................... 43
Table 11. Primary Vendor-Specific Extended Query ................ 43
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 45
Reading Array Data ........................................................................................... 45
Reset Command ................................................................................................. 45
Autoselect Command Sequence ....................................................................46
Enter Secured Silicon Sector/Exit Secured Silicon Sector Command Se-
quence ....................................................................................................................46
Word Program Command Sequence ...........................................................46
Unlock Bypass Command Sequence ........................................................ 47
Figure 4. Program Operation ............................................... 48
Chip Erase Command Sequence ...................................................................48
Sector Erase Command Sequence ................................................................49
Figure 5. Erase Operation ................................................... 50
Erase Suspend/Erase Resume Commands ..................................................50
Password Program Command ........................................................................ 51
Password Verify Command .............................................................................. 51
Password Protection Mode Locking Bit Program Command ............... 51
Persistent Sector Protection Mode Locking Bit Program Command 52
Secured Silicon Sector Protection Bit Program Command .................. 52
PPB Lock Bit Set Command ............................................................................ 52
DYB Write Command ...................................................................................... 52
Password Unlock Command .......................................................................... 52
PPB Program Command .................................................................................. 53
All PPB Erase Command .................................................................................. 53
DYB Write Command ...................................................................................... 53
PPB Lock Bit Set Command ............................................................................ 53
Command ............................................................................................................. 54
Command Definitions Tables ......................................................................... 54
Table 12. Memory Array Command Definitions ...................... 54
Table 13. Sector Protection Command Definitions .................. 55
Write Operation Status . . . . . . . . . . . . . . . . . . . . 56
DQ7: Data# Polling ............................................................................................ 56
Figure 6. Data# Polling Algorithm ........................................ 58
RY/BY#: Ready/Busy# ....................................................................................... 58
DQ6: Toggle Bit I ...............................................................................................58
Figure 7. Toggle Bit Algorithm ............................................. 59
DQ2: Toggle Bit II ..............................................................................................60
Reading Toggle Bits DQ6/DQ2 .....................................................................60
DQ5: Exceeded Timing Limits ........................................................................60
DQ3: Sector Erase Timer .................................................................................61
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