S71PL129JC0 Datasheet, PDF (55/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory

Advance Information
4. During unlock and command cycles, when lower address bits are 555 or 2AAh as shown in table, address bits higher than
A11 (except where BA is required) and data bits higher than DQ7 are don’t cares.
5. No unlock or command cycles required when bank is reading array data.
6. The Reset command is required to return to reading array (or to erase-suspend-read mode if previously in Erase Suspend)
when bank is in autoselect mode, or if DQ5 goes high (while bank is providing status information).
7. Fourth cycle of autoselect command sequence is a read cycle. System must provide bank address to obtain manufacturer ID
or device ID information. See “Autoselect Command Sequence” on page 46 for more information.
8. The data is DQ6=1 for factory and customer locked and DQ7=1 for factory locked.
9. The data is 00h for an unprotected sector group and 01h for a protected sector group.
10. Device ID must be read across cycles 4, 5, and 6. PL129J (X0Eh = 2221h, X0Fh = 2200h).
11. System may read and program in non-erasing sectors, or enter autoselect mode, when in Program/Erase Suspend mode.
Program/Erase Suspend command is valid only during a sector erase operation, and requires bank address.
12. Program/Erase Resume command is valid only during Erase Suspend mode, and requires bank address.
13. Command is valid when device is ready to read array data or when device is in autoselect mode.
14. WP#/ACC must be at V_ID during the entire operation of command.
15. Unlock Bypass Entry command is required prior to any Unlock Bypass operation. Unlock Bypass Reset command is required
to return to the reading array.
Table 13. Sector Protection Command Definitions
Command (Notes)
Bus Cycles (Notes 1-4)
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
Reset
Secured Silicon Sector Entry
Secured Silicon Sector Exit
Secured Silicon Protection Bit Program
(Notes 5, 6)
Secured Silicon Protection Bit Status
Password Program (Notes 5, 7, 8)
Password Verify (Notes 6, 8, 9)
Password Unlock (Notes 7, 10, 11)
PPB Program (Notes 5, 6, 12)
PPB Status
All PPB Erase (Notes 5, 6, 13, 14)
PPB Lock Bit Set
PPB Lock Bit Status (Note 15)
DYB Write (Note 7)
DYB Erase (Note 7)
DYB Status (Note 6)
PPMLB Program (Notes 5, 6, 12)
PPMLB Status (Note 5)
SPMLB Program (Notes 5, 6, 12)
SPMLB Status (Note 5)
1 XXX F0
3 555 AA 2AA 55 555 88
4 555 AA 2AA 55 555 90 XX 00
6 555
AA
2AA
55
555
60
OW
68
OW
48
OW
RD
(0)
5 555
AA
2AA
55
555
60
OW
48
OW
RD
(0)
4 555
AA
2AA
55
555
38
XX PD
[0-3] [0-3]
4 555
AA
2AA
55
555
C8
PWA PWD
[0-3] [0-3]
7 555
AA
2AA
55
555
28
PWA PWD PWA PWD PWA PWD PWA PWD
[0] [0] [1] [1] [2] [2] [3] [3]
6 555
AA
2AA
55
555
60
(SA)
WP
68
(SA)
WP
48
(SA) RD
WP (0)
4 555
AA
2AA
55
555
90
(SA)
WP
RD
(0)
6 555 AA 2AA 55 555
60
WP
60
(SA)
40
(SA) RD
WP (0)
3 555 AA 2AA 55 555 78
4 555 AA 2AA 55 555 58
SA
RD
(1)
4 555 AA 2AA 55 555 48 SA X1
4 555 AA 2AA 55 555 48 SA X0
4 555 AA 2AA 55 555 58
SA
RD
(0)
6 555 AA 2AA 55 555 60
PL
68
PL
48
PL
RD
(0)
5 555 AA 2AA 55 555 60
PL
48
PL
RD
(0)
6 555 AA 2AA 55 555 60
SL
68
SL
48
SL
RD
(0)
5 555 AA 2AA 55 555 60
SL
48
SL
RD
(0)
Legend:
DYB = Dynamic Protection Bit
OW = Address (A7:A0) is (00011010)
PD[3:0] = Password Data (1 of 4 portions)
PPB = Persistent Protection Bit
June 4, 2004 S29PL129J_MCP_00_A0
S29PL129J for MCP
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