S71PL129JC0 Datasheet, PDF (134/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory

Advance Information
DC Characteristics
(Under Recommended Conditions Unless Otherwise Noted)
16M
32M
64M
Parameter Symbol
Test Conditions
Min. Max. Min. Max. Min. Max. Unit
Input Leakage
Current
I_LI
V_IN = V_SS to V_DD
-1.0 +1.0 -1.0 +1.0 -1.0 +1.0 µA
Output Leakage
Current
I_LO
V_OUT = V_SS to V_DD, Output Disable
-1.0 +1.0 -1.0 +1.0 -1.0 +1.0 µA
Output High
Voltage Level
V_OH V_DD = V_DD(min), I_OH = –0.5mA
2.2 — 2.4 — 2.4 — V
Output Low
Voltage Level
V_OL I_OL = 1mA
— 0.4 — 0.4 — 0.4 V
V_DD Power
Down Current
V_DD Standby
Current
I_DDPS
I_DDP4
I_DDP8
V_DD = V_DD max.,
V_IN = V_IH or V_IL,
CE2 ≤ 0.2 V
I_DDP16
I_DDS
V_DD = V_DD max.,
V_IN = V_IH or V_IL
CE1 = CE2 = V_IH
I_DDS1
V_DD = V_DD max.,
V_IN ≤ 0.2V or V_IN ≥ V_DD – 0.2V,
CE1 = CE2 ≥ V_DD – 0.2V
SLEEP
4M Partial
8M Partial
16M Partial
TA< +85°C
TA< +40°C
10
N/A
N/A
N/A
— 10
— 40
— 50
N/A
— 10 µA
N/A
µA
— 80 µA
— 100 µA
— 1 — 1.5 — 1.5 mA
170 µA
— 100 — 80 —
90 µA
V_DD
Active Current
V_DD Page
Read Current
I_DDA1
I_DDA2
V_DD = V_DD max.,
V_IN = V_IH or V_IL,
CE1 = V_IL and CE2= V_IH,
I_OUT=0mA
t_RC / t_WC = min. — 20 — 30 — 40 mA
t_RC / t_WC = 1µs — 3 — 3 — 5 mA
I_DDA3
V_DD = V_DD max., V_IN = V_IH or V_IL,
CE1 = V_IL and CE2= V_IH,
I_OUT=0mA, t_PRC = min.
N/A
— 10 — 10 mA
Notes:
1. All voltages are referenced to V_SS.
2. DC Characteristics are measured after following POWER-UP timing.
3. I_OUT depends on the output load conditions.
134
pSRAM Type 7
pSRAM_Type07_13_A1 November 2, 2004