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S71PL129JC0 Datasheet, PDF (68/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory
Advance Information
Reset
Table 19. Hardware Reset (RESET#)
Parameter
JEDEC Std
Description
tReady
RESET# Pin Low (During Embedded Algorithms)
to Read Mode (See Note)
Max
tReady
RESET# Pin Low (NOT During Embedded
Algorithms) to Read Mode (See Note)
Max
tRP RESET# Pulse Width
Min
tRH Reset High Time Before Read (See Note)
Min
tRPD RESET# Low to Standby Mode
Min
tRB RY/BY# Recovery Time
Min
All Speed Options
Unit
20
µs
500
ns
500
ns
50
ns
20
µs
0
ns
Note: Not 100% tested.
RY/BY#
CE#, OE#
RESET#
RY/BY#
CE#, OE#
tRH
tRP
tReady
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
tReady
tRB
RESET#
tRP
Notes:
1. S29PL129J - During CE1# transitions, CE2# = VIH; During CE2# transitions, CE1# = VIH
2. S29PL129J - There are two CE# (CE1#, CE2#). In the below waveform CE# = CE1# or CE2#
Figure 13. Reset Timings
68
S29PL129J for MCP
S29PL129J_MCP_00_A0 June 4, 2004