S71PL129JC0 Datasheet, PDF (107/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory

Advance Information
3 Volt
Performance Grade
Density
Symbol Parameter
twc Write cycle time
tcw
Chipselect to end
of write
tas
Address set up
Time
taw
Address valid to
end of write
tbw
UB#, LB# valid
to end of write
twp Write pulse width
twr
Write recovery
time
twhz
Write to output
High-Z
tdw
Data to write
time overlap
tdh
Data hold from
write time
tow
End write to
output Low-Z
tow
Write high pulse
width
Page Mode
-70
64Mb pSRAM
Min
Max Units
70
20k
ns
60
ns
0
ns
60
ns
60
ns
50
20k
ns
0
ns
5
ns
20
ns
0
ns
5
7.5
ns
Timing Diagrams
Read Cycle
tpc Page read cycle
20
20k
ns
tpa
Page address
access time
20
ns
twpc Page write cycle
20
20k
ns
tcp
Chip select high
pulse width
10
ns
Address
t_RC
t_AA
t_OH
Data Out
Previous Data Valid
Data Valid
Figure 33. Timing of Read Cycle (CE# = OE# = V_IL, WE# = ZZ# = V_IH)
August 30, 2004 pSRAM_Type01_12_A1
pSRAM Type 1
107