S71PL129JC0 Datasheet, PDF (7/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory

Advance Information
Connection Diagram
64-ball Fine-Pitch Ball Grid Array
(Top View, Balls Facing Down)
A1
NC
D2
A3
E2
A2
F2
A1
G2
A0
H2
CE1#f
J2
CE1#s
C3
A7
D3
A6
E3
A5
F3
A4
G3
VSS
H3
OE#
J3
DQ0
K3
DQ8
M1
NC
B5
B6
RFU
RFU
C4
C5
C6
LB# WP/ACC WE#
D4
D5
D6
UB# RST#f CE2s
E4
E5
E6
A18 RY/BY# A20
F4
A17
G4
DQ1
H4
H5
H6
DQ9
DQ3
DQ4
J4
J5
J6
DQ10 VCCf VCCs
K4
K5
K6
DQ2 DQ11 RFU
L5
L6
RFU
RFU
C7
A8
D7
A19
E7
A9
F7
A10
G7
DQ6
H7
DQ13
J7
DQ12
K7
DQ5
C8
A11
D8
A12
E8
A13
F8
A14
G8
RFU
H8
DQ15
J8
DQ7
K8
DQ14
A10
NC
D9
A15
E9
A21
F9
CE2#
G9
A16
H9
RFU
J9
VSS
M10
NC
Legend
Shared
(Note 1)
Flash only
RAM only
Reserved for
Future Use
Note: May be shared depending on density:
— A21 is shared for the 64M pSRAM configuration.
— A20 is shred for the 32M pSRAM configuration.
— A19 is shared for the 16M pSRAM configuration.
MCP
Flash-only Addresses
S71PL129JC0
A22
S71PL129JB0
A22-A21
S71PL129JA0
A22-A20
Note: It is advised to tie J5 and L5 together on the board.
Shared Addresses
A21-A0
A20-A0
A19-A0
December 23, 2004 S71PL129Jxx_00_A5
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