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S71PL129JC0 Datasheet, PDF (73/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory
Advance Information
Addresses
CE#
WE#
tOEH
OE#
DQ6/DQ2
tDH
Valid Data
tAHT
tAS
tOEPH
tASO
tAHT
tCEPH
Valid
Status
(first read)
tOE
Valid
Status
(second read)
Valid
Status
(stops toggling)
Valid Data
RY/BY#
Notes:
1. VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last
status read cycle, and array data read cycle
2. S29PL129J - During CE1# transitions, CE2# = VIH; During CE2# transitions, CE1# = VIH
3. S29PL129J - There are two CE# (CE1#, CE2#). In the above waveform CE# = CE1# or CE2#
Figure 19. Toggle Bit Timings (During Embedded Algorithms)
WE#
Enter
Embedded
Erasing
Erase
Suspend
Enter Erase
Suspend Program
Erase
Erase Suspend
Read
Erase
Suspend
Program
Erase
Resume
Erase Suspend
Read
Erase
DQ6
Erase
Complete
DQ2
Note:Note: DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or
CE# to toggle DQ2 and DQ6.
Figure 20. DQ2 vs. DQ6
June 4, 2004 S29PL129J_MCP_00_A0
S29PL129J for MCP
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