S71PL129JC0 Datasheet, PDF (18/149 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory

Advance Information
Pin Description
Amax–A0
=
DQ15–DQ0
=
CE#
=
OE#
=
WE#
=
V_SS
=
NC
=
RY/BY#
=
WP#/ACC
=
V_IO
=
V_CC
=
RESET#
=
CE1#, CE2#
=
Notes:
1. Amax = A21
Logic Symbol
Address bus
16-bit data inputs/outputs/float
Chip Enable Inputs
Output Enable Input
Write Enable
Device Ground
Pin Not Connected Internally
Ready/Busy output and open drain.
When RY/BY#= V_IH, the device is ready to accept
read operations and commands. When RY/BY#=
V_OL, the device is either executing an embedded
algorithm or the device is executing a hardware
reset operation.
Write Protect/Acceleration Input.
When WP#/ACC= V_IL, the highest and lowest two
4K-word sectors are write protected regardless of
other sector protection configurations. When WP#/
ACC= V_IH, these sector are unprotected unless the
DYB or PPB is programmed. When WP#/ACC= 12V,
program and erase operations are accelerated.
Input/Output Buffer Power Supply 2.7 V to 3.6 V
Chip Power Supply
(2.7 V to 3.6 V or 2.7 to 3.3 V)
Hardware Reset Pin
Chip Enable Inputs.
CE1# controls the 64Mb in Banks 1A and 1B. CE2#
controls the 64 Mb in Banks 2A and 2B.
max+1
Amax–A0
16
DQ15–DQ0
CE#
OE#
WE#
WP#/ACC
RESET#
RY/BY#
V_IO (V_CCQ)
18
S29PL129J for MCP
S29PL129J_MCP_00_A0 June 4, 2004