C8051F2XX Datasheet, PDF (63/146 Pages) Silicon Laboratories – Mixed Signal 8 kB ISP Flash MCU Family

C8051F2xx
Table 9.1. CIP-51 Instruction Set Summary (Continued)
Mnemonic
JNC rel
JB bit,rel
JNB bit,rel
JBC bit,rel
Program Branching
ACALL addr11
LCALL addr16
RET
RETI
AJMP addr11
LJMP addr16
SJMP rel
JMP @A+DPTR
JZ rel
JNZ rel
CJNE A,direct,rel
CJNE A,#data,rel
CJNE Rn,#data,rel
CJNE @Ri,#data,rel
DJNZ Rn,rel
DJNZ direct,rel
NOP
Description
Jump if carry not set
Jump if direct bit is set
Jump if direct bit is not set
Jump if direct bit is set and clear bit
Bytes
2
3
3
3
Absolute subroutine call
2
Long subroutine call
3
Return from subroutine
1
Return from interrupt
1
Absolute jump
2
Long jump
3
Short jump (relative address)
2
Jump indirect relative to DPTR
1
Jump if A equals zero
2
Jump if A does not equal zero
2
Compare direct byte to A and jump if not equal
3
Compare immediate to A and jump if not equal
3
Compare immediate to register and jump if not equal
3
Compare immediate to indirect and jump if not equal
3
Decrement register and jump if not zero
2
Decrement direct byte and jump if not zero
3
No operation
1
Clock
Cycles
2/3
3/4
3/4
3/4
3
4
5
5
3
4
3
3
2/3
2/3
3/4
3/4
3/4
4/5
2/3
3/4
1
Rev. 1.6
63