C8051F2XX Datasheet, PDF (138/146 Pages) Silicon Laboratories – Mixed Signal 8 kB ISP Flash MCU Family

C8051F2xx
SFR Definition 17.9. RCAP2L: Timer 2 Capture Register Low Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0xCA
Bits 7–0: RCAP2L: Timer 2 Capture Register Low Byte.
The RCAP2L register captures the low byte of Timer 2 when Timer 2 is configured in capture
mode. When Timer 2 is configured in auto-reload mode, it holds the low byte of the reload
value.
SFR Definition 17.10. RCAP2H: Timer 2 Capture Register High Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0xCB
Bits 7–0: RCAP2H: Timer 2 Capture Register High Byte.
The RCAP2H register captures the high byte of Timer 2 when Timer 2 is configured in cap-
ture mode. When Timer 2 is configured in auto-reload mode, it holds the high byte of the
reload value.
SFR Definition 17.11. TL2: Timer 2 Low Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bits 7–0: TL2: Timer 2 Low Byte.
The TL2 register contains the low byte of the 16-bit Timer 2.
R/W
Reset Value
00000000
Bit0 SFR Address:
0xCC
SFR Definition 17.12. TH2: Timer 2 High Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bits 7–0: TH2: Timer 2 High Byte.
The TH2 register contains the high byte of the 16-bit Timer 2.
R/W
Reset Value
00000000
Bit0 SFR Address:
0xCD
138
Rev. 1.6