C8051F2XX Datasheet, PDF (132/146 Pages) Silicon Laboratories – Mixed Signal 8 kB ISP Flash MCU Family

C8051F2xx
SFR Definition 17.4. TL0: Timer 0 Low Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0x8A
Bits 7–0: TL0: Timer 0 Low Byte.
The TL0 register is the low byte of the 16-bit Timer 0.
SFR Definition 17.5. TL1: Timer 1 Low Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0x8B
Bits 7–0: TL1: Timer 1 Low Byte.
The TL1 register is the low byte of the 16-bit Timer 1.
SFR Definition 17.6. TH0: Timer 0 High Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bits 7–0: TH0: Timer 0 High Byte.
The TH0 register is the high byte of the 16-bit Timer 0.
R/W
Reset Value
00000000
Bit0 SFR Address:
0x8C
SFR Definition 17.7. TH1: Timer 1 High Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bits 7–0: TH1: Timer 1 High Byte.
The TH1 register is the high byte of the 16-bit Timer 1.
R/W
Reset Value
00000000
Bit0 SFR Address:
0x8D
132
Rev. 1.6