C8051F2XX Datasheet, PDF (127/146 Pages) Silicon Laboratories – Mixed Signal 8 kB ISP Flash MCU Family

C8051F2xx
17.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload
Mode 2 configures Timer 0 and Timer 1 to operate as 8-bit counter/timers with automatic reload of the start
value. The TL0 holds the count and TH0 holds the reload value. When the counter in TL0 overflows from
all ones to 0x00, the timer overflow flag TF0 (TCON.5) is set and the counter in TL0 is reloaded from TH0.
If enabled, an interrupt will occur when the TF0 flag is set. The reload value in TH0 is not changed. TL0
must be initialized to the desired value before enabling the timer for the first count to be correct. When in
Mode 2, Timer 1 operates identically to Timer 0. Both counter/timers are enabled and configured in Mode
2 in the same manner as Mode 0.
SYSCLK
CKCON
TTT
210
MMM
12
0
1
0
TMOD
GCT T GCT T
A _{/ 11}A _{/ 00}
T
E
T MM
T
E
T MM
1 110 0 010
T0
PORT0
MUX
1
TR0
TCLK
TL0
(8 bits)
GATE0
/INT0
PORT0
MUX
TH0
(8 bits)
Reload
Figure 17.2. T0 Mode 2 Block Diagram
TF1
TR1
TF0
Interrupt
TR0
IE1
IT1
IE0
IT0
Rev. 1.6
127