C8051F2XX Datasheet, PDF (103/146 Pages) Silicon Laboratories – Mixed Signal 8 kB ISP Flash MCU Family

C8051F2xx
SFR Definition 14.1. PRT0MX: Port I/O MUX Register 0
R/W
T2EXE
Bit7
R/W
T2E
Bit6
R/W
T1E
Bit5
R/W
T0E
Bit4
R/W
INT1E
Bit3
R/W
INT0E
Bit2
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
T2EXE: T2EX Enable Bit
0: T2EX unavailable at Port pin.
1: T2EX routed to Port Pin.
T2E: T2 Enable Bit
0: T2 unavailable at Port pin.
1: T2 routed to Port Pin.
T1E: T1 Enable Bit
0: T1 unavailable at Port pin.
1: T1 routed to Port Pin.
T0E: T0 Enable Bit
0: T0 unavailable at Port pin.
1: T0 routed to Port Pin.
INT1E: /INT1 Enable Bit
0: /INT1 unavailable at Port pin.
1: /INT1 routed to port pin.
INT0E: /INT0 Enable Bit
0: /INT0 unavailable at Port pin.
1: /INT0 routed to Port Pin.
UNUSED. Read = 0, Write = don't care.
UARTEN: UART I/O Enable
0: UART I/O unavailable at port pins.
1: TX, RX routed to pins P0.0 and P0.1, respectively.
R
R/W
Reset Value
-
UARTEN 00000000
Bit1
Bit0 SFR Address:
0xE1
Rev. 1.6
103