M16C6S_09 Datasheet, PDF (86/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Timer A
Timer Ai Mode Register (i=4)
(When Using Two-Phase Pulse Signal Processing)
b7 b6 b5 b4 b3 b2 b1 b0
0 1 0 00 1
Symbol
TA4MR
Address
039Ah
After Reset
00h
Bit Symbol
Bit Name
Function
RW
TMOD0 _{Operation Mode Select Bit} ^{b1 b0}
RW
TMOD1
0 1 : Event counter mode
RW
MR0
To use two-phase pulse signal processing, set this bit to “0”.
RW
MR1
To use two-phase pulse signal processing, set this bit to “0”.
RW
MR2
To use two-phase pulse signal processing, set this bit to “1”.
RW
MR3
To use two-phase pulse signal processing, set this bit to “0”.
RW
TCK0
Count Operation Type
Select Bit
0 : Reload type
1 : Free-run type
RW
TCK1
Two-Phase Pulse Signal
Processing Operation
0 : Normal processing operation
RW
Select Bit ^{(1, 2)}
1 : Multiply-by-4 processing operation
NOTES:
1. No matter how this bit is set, timer A4 always operates in x4 processing mode.
2. If two-phase pulse signal processing is desired, following register settings are required:
• Set the TAiP bit in the UDF register to “1” (two-phase pulse signal processing function enabled).
• Set the TAiTGH and TAiTGL bits in the TRGSR register to “00b” (TAiIN pin input).
• Set the port direction bits for TAiIN and TAiOUT to “0” (input mode).
Figure 1.12.8. TA4MR Registers in Event Counter Mode (when using two-phase pulse signal
processing with timer A4)
Rev.5.01 Dec 10, 2009 page 86 of 201
REJ03B0014-0501