M16C6S_09 Datasheet, PDF (60/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Interrupts
Priority level of each interrupt
INT1
Timer A3
Timer A1
UART1 bus collision
INT3
INT2
INT0
Timer A4
Timer A2
UART0 bus collision
UART1 reception, ACK1
UART0 reception, ACK0
UART2 reception, ACK2
DMA1
UART 2 bus collision
SI/O4
Timer A0
UART1 transmission, NACK1
UART0 transmission, NACK0
UART2 transmission, NACK2
DMA0
SI/O3
IPL
Level 0 (initial value)
I flag
Address match
Watchdog timer
Oscillation stop and
re-oscillation detection
Power supply down detection
DBC
High
Priority of peripheral function interrupts
(if priority levels are same)
Low
Interrupt request level resolution output
To clock generation circuit (Figure 1.7.1)
Interrupt
request
accepted
Figure 1.9.9. Interrupts Priority Select Circuit
Rev.5.01 Dec 10, 2009 page 60 of 201
REJ03B0014-0501