M16C6S_09 Datasheet, PDF (114/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
UART Mode
Counter Measure for Communication Error Occurs
If a communication error occurs while transmitting or receiving in UART mode, follow the procedures
below.
• Resetting the UiRB register (i=0 to 2)
(1) Set the RE bit in the UiC1 register to “0” (reception disabled)
(2) Set the RE bit in the UiC1 register to “1” (reception enabled)
• Resetting the UiTB register (i=0 to 2)
(1) Set the SMD2 to SMD0 bits in the UiMR register “000b” (Serial I/O disabled)
(2) Set the SMD2 to SMD0 bits in the UiMR register “001b”, “101b”, “110b”.
(3) “1” is written to RE bit in the UiC1 register (reception enabled), regardless of the TE bit in the UiCi
register
(a) LSB First/MSB First Select Function
As shown in Figure 1.15.3, use the UiC0 register’s UFORM bit to select the transfer format. This
function is valid when transfer data is 8 bits long.
(1) When UiC0 register's UFORM bit = 0 (LSB first)
CLKi
TXDi
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
RXDi
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
(2) When UiC0 register's UFORM bit = 1 (MSB first)
CLKi
TXDi
ST D7 D6 D5 D4 D3 D2 D1 D0 P SP
RXDi
ST D7 D6 D5 D4 D3 D2 D1 D0 P SP
Note: This applies to the case where the UiC0 register’s CKPOL bit = 0 (
transmit data output at the falling edge and the receive data taken
in at the rising edge of the transfer clock), the UiC1 register’s UiLCH
bit = 0 (no reverse), UiMR register's STPS bit = 0 (1 stop bit) and
UiMR register's PRYE bit = 1 (parity enabled).
ST : Start bit
P : Parity bit
SP : Stop bit
i = 0 to 2
Figure 1.15.3. Transfer Format
Rev.5.01 Dec 10, 2009 page 114 of 201
REJ03B0014-0501