M16C6S_09 Datasheet, PDF (29/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Clock Generation Circuit
System clock control register 0 (Notes 1 and 4)
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
CM0
Address
000616
After reset
010010002
Bit symbol
Bit name
Function
RW
(b1-b0)
CM02
Nothing is assigned. When write, set to “0”.
When read, its content is indeterminate.
WAIT peripheral function
clock stop bit (Note 3)
0 : Do not stop peripheral function clock in wait mode
1 : Stop peripheral function clock in wait mode
RW
(b4-b3)
Nothing is assigned. When write, set to “0”.
When read, its content is indeterminate.
(b5)
Reserved bit
Should be set to “0”.
RW
CM06
Main clock division select 0 : CM16 and CM17 valid
bit 0 (Notes 5, 13)
1 : Division by 8 mode
RW
(b7)
Reserved bit
Should be set to “0”.
RW
Note 1: Write to this register after setting the PRC0 bit of PRCR register to “1” (write enable).
Note 2: When entering stop mode from high or middle speed mode, On-chip Oscillator mode or On-chip Oscillator low power mode,
the CM06 bit is set to “1” (divide-by-8 mode).
Note 3: When the PM21 bit of PM2 register is set to “1” (clock modification disable), writing to the CM02 bits has no effect.
Note 4: To use the main clock as the clock source for the CPU clock, follow the procedure below.
(1) Wait until td(M-L) elapses or the main clock oscillation stabilizes, whichever is longer.
(2) Set the CM21 to “0”.
Note 5: During On-chip Oscillator low power dissipation mode, the divide-by-n value can be selected using the CM06 and CM17 to
CM16 bits. To return to high or middle speed mode, however, set the CM06 bit to “1”, before selecting the desired mode.
Figure 1.7.2. CM0 Register
Rev.5.01 Dec 10, 2009 page 29 of 201
REJ03B0014-0501