M16C6S_09 Datasheet, PDF (192/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Usage Notes
Watchdog Timer Interrupt
Initialize the watchdog timer after the watchdog timer interrupt occurs.
DMAC
Write to DMAE Bit in DMiCON Register (i = 0 to 1)
When both of the conditions below are met, follow the steps below.
(a) Conditions
• The DMAE bit is set to 1 again while it remains set (DMAi is in an active state).
• A DMA request may occur simultaneously when the DMAE bit is being written.
(b) Procedure
(1) Write 1 to the DMAE bit and DMAS bit in DMiCON register simultaneously ⁽¹⁾.
(2) Make sure that the DMAi is in an initial state ⁽²⁾ in a program.
If the DMAi is not in an initial state, the above steps should be repeated.
NOTES:
1. The DMAS bit remains unchanged even if 1 is written. However, if 0 is written to this bit, it is set to 0
(DMA not requested). In order to prevent the DMAS bit from being modified to 0, 1 should be written to
the DMAS bit when 1 is written to the DMAE bit. In this way the state of the DMAS bit immediately
before being written can be maintained.
Similarly, when writing to the DMAE bit with a read-modify-write instruction, 1 should be written to the
DMAS bit in order to maintain a DMA request which is generated during execution.
2. Read the TCRi register to verify whether the DMAi is in an initial state. If the read value is equal to a
value which was written to the TCRi register before DMA transfer start, the DMAi is in an initial state. (If
a DMA request occurs after writing to the DMAE bit, the value written to the TCRi register is 1.) If the
read value is a value in the middle of transfer, the DMAi is not in an initial state.
Rev.5.01 Dec 10, 2009 page 192 of 201
REJ03B0014-0501