M16C6S_09 Datasheet, PDF (72/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
DMAC
DMAi source pointer (i = 0, 1) (Note)
(b23)
b7
(b19)
b3
(b16)(b15)
b0 b7
(b8)
b0 b7
b0 Symbol
SAR0
SAR1
Address
002216 to 002016
003216 to 003016
After reset
Indeterminate
Indeterminate
Function
Setting range
RW
Set the source address of transfer
0000016 to FFFFF16 RW
Nothing is assigned. When write, set “0”. When read, these contents
are “0”.
Note: If the DSD bit of DMiCON register is “0” (fixed), this register can only be written to when the DMAE bit of
DMiCON register is “0” (DMA disabled).
If the DSD bit is “1” (forward direction), this register can be written to at any time.
If the DSD bit is “1” and the DMAE bit is “1” (DMA enabled), the DMAi forward address pointer can be read from
this register. Otherwise, the value written to it can be read.
DMAi destination pointer (i = 0, 1)(Note)
(b23)
b7
(b19)
b3
(b16)(b15)
b0 b7
(b8)
b0 b7
b0 _Symbol
DAR0
DAR1
Address
002616 to 002416
003616 to 003416
After reset
Indeterminate
Indeterminate
Function
Setting range
RW
Set the destination address of transfer
0000016 to FFFFF16 ^RW
Nothing is assigned. When write, set “0”. When read, these contents
are “0”.
Note: If the DAD bit of DMiCON register is “0” (fixed), this register can only be written to when the DMAE bit of
DMiCON register is “0”(DMA disabled).
If the DAD bit is “1” (forward direction), this register can be written to at any time.
If the DAD bit is “1” and the DMAE bit is “1” (DMA enabled), the DMAi forward address pointer can be read from
this register. Otherwise, the value written to it can be read.
DMAi transfer counter (i = 0, 1)
(b15)
b7
(b8)
b0 b7
b0
Symbol
Address
After reset
TCR0
002916, 002816 Indeterminate
TCR1
003916, 003816 Indeterminate
Function
Setting range
RW
Set the transfer count minus 1. The written value
is stored in the DMAi transfer counter reload
register, and when the DMAE bit of DMiCON
register is set to “1” (DMA enabled) or the DMAi
transfer counter underflows when the DMASL bit
000016 to FFFF16 RW
of DMiCON register is “1” (repeat transfer), the
value of the DMAi transfer counter reload register
is transferred to the DMAi transfer counter.
When read, the DMAi transfer counter is read.
Figure 1.11.4. SAR0, SAR1, DAR0, DAR1, TCR0, and TCR1 Registers
Rev.5.01 Dec 10, 2009 page 72 of 201
REJ03B0014-0501