M16C6S_09 Datasheet, PDF (106/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Clock Synchronous serial I/O Mode
(b) LSB First/MSB First Select Function
Use the UiC0 register (i = 0 to 1)’s UFORM bit to select the transfer format. Figure 1.14.3 shows the
transfer format.
(1) When UiC0 register's UFORM bit = 0 (LSB first)
CLKi
TXDi
D0 D1 D2 D3 D4 D5 D6 D7
RXDi
D0 D1 D2 D3 D4 D5 D6 D7
(2) When UiC0 register's UFORM bit = 1 (MSB first)
CLKi
TXDi
D7 D6 D5 D4 D3 D2 D1 D0
RXDi
D7 D6 D5 D4 D3 D2 D1 D0
Note: This applies to the case where the UiC0 register’s CKPOL bit = 0 (
transmit data output at the falling edge and the receive data taken
in at the rising edge of the transfer clock) and the UiC1 register’s
UiLCH bit = 0 (no reverse).
i = 0 to 1
Figure 1.14.3. Transfer Format
(c) Continuous Receive Mode
In continuous receive mode, receive operation becomes enable when the receive buffer register is
read. It is not necessary to write dummy data into the transmit buffer register to enable receive
operation in this mode. However, a dummy read of the receive buffer register is required when start-
ing the operation mode.
When the UiRRM bit (i = 0 to 1) = 1 (continuous receive mode), the UiC1 register’s TI bit is set to “1”
(data present in the UiTB register) by reading the UiRB register. In this case, i.e., UiRRM bit = 1, do not
write dummy data to the UiTB register in a program. The U0RRM and U1RRM bits are the UCON
register bit 2 and bit 3, respectively.
(d) Serial Data Logic Switching Function
When the UiC1 register (i = 0 to 1)’s UiLCH bit = 1 (reverse), the data written to the UiTB register has
its logic reversed before being transmitted. Similarly, the received data has its logic reversed when
read from the UiRB register. Figure 1.14.4 shows serial data logic.
Rev.5.01 Dec 10, 2009 page 106 of 201
REJ03B0014-0501