M16C6S_09 Datasheet, PDF (177/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Flash Memory Version
Full Status Check
When an error occurs, the FMR0 register’s FMR06 to FMR07 bits are set to “1”, indicating occurrence
of each specific error. Therefore, execution results can be verified by checking these status bits (full
status check). Table 1.21.4 lists errors and FMR0 register status. Figure 1.21.6 shows a full status
check flowchart and the action to be taken when each error occurs.
Table 1.21.4. Errors and FMR0 Register Status
FMR00 register
(SRD register)
status
Error
Error occurrence condition
FMR07 FMR06
(SR5) (SR4)
1
1
Command
• When any commands are not written correctly
sequence error • A value other than ‘xxD016’ or ‘xxFF16’ is written in the second
bus cycle of the block erase command (Note 1)
• When the block erase command is executed on protected blocks
• When the program command is executed on protected blocks
1
0
Erase error
• When the block erase command is executed on unprotected
blocks but the blocks are not automatically erased correctly
0
1
Program error • When the program command is executed on unprotected blocks
but the blocks are not automatically programmed correctly.
Note 1: The flash memory enters read array mode by writing command code ‘xxFF16’ in the second bus
cycle of these commands. The command code written in the first bus cycle becomes invalid.
Rev.5.01 Dec 10, 2009 page 177 of 201
REJ03B0014-0501