M16C6S_09 Datasheet, PDF (110/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
UART Mode
Table 1.15.2. Registers to Be Used and Settings in UART Mode
Register
UiTB
UiRB
Bit
0 to 8
0 to 8
Function
Set transmission data (Note 1)
Reception data can be read (Note 1)
OER,FER,PER,SUM Error flag
UiBRG
UiMR
0 to 7
SMD2 to SMD0
CKDIR
Set a transfer rate
Set these bits to ‘1002’ when transfer data is 7 bits long
Set these bits to ‘1012’ when transfer data is 8 bits long
Set these bits to ‘1102’ when transfer data is 9 bits long
Select the internal clock or external clock
STPS
PRY, PRYE
IOPOL
Select the stop bit
Select whether parity is included and whether odd or even
Select the TxD/RxD input/output polarity
UiC0
CLK0, CLK1
CRS
TXEPT
CRD
Select the count source for the UiBRG register
_______
_______
Select CTS or RTS to use
Transmit register empty flag
_______
_______
Enable or disable the CTS or RTS function
NCH
Select TxDi pin output mode (Note 2)
CKPOL
Set to “0”
UiC1
UFORM
TE
LSB first or MSB first can be selected when transfer data is 8 bits long. Set this
bit to “0” when transfer data is 7 or 9 bits long.
Set this bit to “1” to enable transmission
TI
Transmit buffer empty flag
RE
RI
U2IRS (Note 2)
Set this bit to “1” to enable reception
Reception complete flag
Select the source of UART2 transmit interrupt
U2RRM (Note 2) Set to “0”
UiLCH
Set this bit to “1” to use inverted data logic
UiSMR
UiSMR2
UiERE
0 to 7
0 to 7
Set to “0”
Set to “0”
Set to “0”
UiSMR3 0 to 7
Set to “0”
UiSMR4
UCON
0 to 7
U0IRS, U1IRS
U0RRM, U1RRM
Set to “0”
Select the source of UART0/UART1 transmit interrupt
Set to “0”
CLKMD0
Invalid because CLKMD1 = 0
CLKMD1
RCSP
7
Set to “0”
_________
Set this bit to “1” to accept as input the UART0 CTS0 signal from the P64 pin
Set to “0”
Note 1: The bits used for transmit/receive data are as follows: Bit 0 to bit 6 when transfer data is 7 bits long;
bit 0 to bit 7 when transfer data is 8 bits long; bit 0 to bit 8 when transfer data is 9 bits long.
Note 2: Set the U0C1 and U1C1 registers bit 4 to bit 5 to “0”. The U0IRS, U1IRS, U0RRM and U1RRM bits
are included in the UCON register.
Note 3: TxD2 pin is N channel open-drain output. Set the U2C0 register's NCH bit to “0”.
i=0 to 2
Rev.5.01 Dec 10, 2009 page 110 of 201
REJ03B0014-0501