M16C6S_09 Datasheet, PDF (71/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
DMA1 request cause select register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DM1SL
Address
03BA16
After reset
0016
Bit symbol
Bit name
Function
RW
DSEL0 _{DMA request cause Refer to note}
RW
DSEL1 ^{select bit}
RW
DSEL2
RW
DSEL3
RW
(b5-b4)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
DMS
DSR
DMA request cause
expansion select bit
Software DMA
request bit
0: Basic cause of request
1: Extended cause of request
RW
A DMA request is generated by
setting this bit to “1” when the DMS
bit is “0” (basic cause) and the
RW
DSEL3 to DSEL0 bits are “00012”
(software trigger).
The value of this bit when read is “0” .
Note: The causes of DMA1 requests can be selected by a combination of DMS bit and DSEL3 to DSEL0 bits in the
manner described below.
DSEL3 to DSEL0 DMS=0(basic cause of request)
DMS=1(extended cause of request)
0 0 0 02
Falling edge of INT1 pin
–
0 0 0 12
Software trigger
–
0 0 1 02
Timer A0
–
0 0 1 12
Timer A1
–
0 1 0 02
Timer A2
–
0 1 0 12
Timer A3
SI/O3
0 1 1 02
0 1 1 12
Timer A4
–
SI/O4
Two edges of INT1
1 0 0 02
–
–
1 0 0 12
–
–
1 0 1 02
UART0 transmit
–
1 0 1 12
UART0 receive/ACK0
–
1 1 0 02
UART2 transmit
–
1 1 0 12
UART2 receive/ACK2
–
1 1 1 02
–
–
1 1 1 12
UART1 receive/ACK1
–
DMAi control register(i=0,1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DM0CON
DM1CON
Address
002C16
003C16
After reset
00000X002
00000X002
Bit symbol
Bit name
Function
RW
DMBIT
Transfer unit bit select bit 0 : 16 bits
1 : 8 bits
RW
DMASL
DMAS
Repeat transfer mode
select bit
DMA request bit
0 : Single transfer
1 : Repeat transfer
0 : DMA not requested
1 : DMA requested
RW
RW
(Note 1)
DMAE
DMA enable bit
0 : Disabled
1 : Enabled
RW
DSD
Source address direction _{0 : Fixed}
select bit (Note 2)
1 : Forward
RW
DAD
Destination address
0 : Fixed
direction select bit (Note 2) _{1 : Forward}
RW
(b7-b6)
Nothing is assigned. When write, set to “0”. When
read, its content is “0”.
Note 1: The DMAS bit can be set to “0” by writing “0” in a program (This bit remains unchanged even if “1” is written).
Note 2: At least one of the DAD and DSD bits must be “0” (address direction fixed).
Figure 1.11.3. DM1SL Register, DM0CON Register, and DM1CON Registers
Rev.5.01 Dec 10, 2009 page 71 of 201
REJ03B0014-0501
DMAC