M16C6S_09 Datasheet, PDF (28/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Clock Generation Circuit
XIN
XOUT
5.12MHz
Standard serial I/O mode
(5.12MHz)
46.08MHz
PLL
1/3
Normal operation mode
IT800 CLK_IN (15.36MHz)
CM10=1(stop mode)
SQ
CM21
On-chip
oscillator
On-chip
oscillator
clock
Oscillation
stop, re-
oscillation
detection
circuit
R
Main
clock
CM21=1
CM21=0
f1
f2
f8
PCLK0=1
PCLK0=0
f32
fAD
f1SIO
f2SIO
PCLK1=1
PCLK1=0
f8SIO
eb c
a _Divider d
f32SIO
CM07=0
CPU clock
BCLK
WAIT instruction
SQ
R
RESET
Software reset
Interrupt request level judgment output
CM02, CM04, CM05, CM06, CM07: CM0 register bits
CM10, CM11, CM16, CM17: CM1 register bits
PCLK0, PCLK1: PCLK register bits
CM21, CM27 : CM2 register bits
CM02
e
b
c
a
1/2
1/2
1/2
1/2
1/2
1/32
1/2
1/4
1/8
1/16
CM06=1
CM06=0
CM17–CM16=102
CM06=0
CM17–CM16=11 2
d
CM06=0
CM17–CM16=012
CM06=0
CM17–CM16=002
Details of divider
Oscillation stop, re-oscillation detection circuit(Note)
Main
clock
Pulse generation
circuit for clock
edge detection
and charge,
discharge control
Charge,
discharge
circuit
CM27 ₀
1
Reset
generating
circuit
Oscillation stop
detection reset
Oscillation stop,
re-oscillation
detection interrupt
generating circuit
Oscillation stop,
re-oscillation
detection signal
CM21 switch signal
Note. Even if XIN input stops, PLL does not stop. Oscillation stop, re-oscillation detect circuit does not function.
Figure 1.7.1. Clock Generation Circuit
Rev.5.01 Dec 10, 2009 page 28 of 201
REJ03B0014-0501