M16C6S_09 Datasheet, PDF (124/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Special Mode
Table 1.16.5. STSPSEL Bit Functions
Function
STSPSEL = 0
Output of SCLi and SDAi pins
Output of transfer clock and
data
Output of start/stop condition is
accomplished by a program
using ports (not automatically
generated in hardware)
Star/stop condition interrupt
Start/stop condition detection
request generation timing
STSPSEL = 1
Output of a start/stop condition
according to the STAREQ,
RSTAREQ and STPREQ bit
Finish generating start/stop condi-
tion
(1) When slave
CKDIR=1 (external clock)
STPSEL bit 0
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
SCLi
SDAi
Start condition
detection interrupt
Stop condition
detection interrupt
(2) When master
CKDIR=0 (internal clock), CKPH=1 (clock delayed)
STPSEL bit
SCLi
Set to “1” in
a program
Set to “0” in
Set to “1” in
a program
a program
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
Set to “0” in
a program
SDAi
Set STAREQ=
1 (start)
Start condition
detection interrupt
Figure 1.16.4. STSPSEL Bit Functions
Set STPREQ=
1 (start)
Stop condition
detection interrupt
• Arbitration
Unmatching of the transmit data and SDAi pin input data is checked synchronously with the rising
edge of SCLi. Use the UiSMR register’s ABC bit to select the timing at which the UiRB register’s ABT
bit is updated. If the ABC bit = 0 (updated bitwise), the ABT bit is set to “1” at the same time
unmatching is detected during check, and is cleared to “0” when not detected. In cases when the ABC
bit is set to “1”, if unmatching is detected even once during check, the ABT bit is set to “1” (unmatching
detected) at the falling edge of the clock pulse of 9th bit. If the ABT bit needs to be updated bytewise,
clear the ABT bit to “0” (undetected) after detecting acknowledge in the first byte, before transferring
the next byte.
Setting the UiSMR2 register’s ALS bit to “1” (SDA output stop enabled) causes arbitration-lost to
occur, in which case the SDAi pin is placed in the high-impedance state at the same time the ABT bit
is set to “1” (unmatching detected).
Rev.5.01 Dec 10, 2009 page 124 of 201
REJ03B0014-0501