M16C6S_09 Datasheet, PDF (31/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Clock Generation Circuit
Oscillation stop detection register (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
CM2
Address
After reset
000C16 _{0X0000002(Note 10)}
Bit symbol
Bit name
Function
RW
CM20
Oscillation stop, re-
oscillation detection bit
(Notes 7, 8, 9, 10)
0: Oscillation stop, re-oscillation
detection function disabled
1: Oscillation stop, re-oscillation
RW
detection function enabled
CM21
System clock select bit 2 ^{0: Main clock (On-chip Oscillator}
(Notes 2, 3, 6, 10)
turned off)
1: On-chip Oscillator clock
RW
(On-chip Oscillator oscillating)
CM22 ^{Oscillation stop, re-}
0: Main clock stop, re-oscillation
oscillation detection flag not detected
RW
(Note 4)
1: Main clock stop, re-oscillation
detected
CM23
XIN monitor flag
(Note 5)
0: Main clock oscillating
1: Main clock turned off
RO
(b5-b4) ^{Reserved bit}
Must set to “0”
RW
Nothing is assigned. When write, set to “0”. When read, its
(b6)
content is indeterminate.
CM27 ^{Operation select bit}
0: Oscillation stop detection reset
(when an oscillation stop, 1: Oscillation stop, re-oscillation
RW
re-oscillation is detected) detection interrupt
(Note 10)
Note 1: Write to this register after setting the PRC0 bit of PRCR register to “1” (write enable).
Note 2: When the CM20 bit is “1” (oscillation stop, re-oscillation detection function enabled), the CM27 bit is “1”
(oscillation stop, re-oscillation detection interrupt), and the CPU clock source is the main clock, the
CM21 bit is set to “1” (On-chip Oscillator clock) if the main clock stop is detected.
Note 3: If the CM20 bit is “1” and the CM23 bit is “1” (main clock turned off), do not set the CM21 bit to “0”.
Note 4: This bit becomes “1” at main clock stop detection and main clock re-oscillation detection. When this bit
changes from “0” to “1”, there arise oscillation stop, re-oscillation detection interrupt. Use this register to
discriminate the causes for oscillation stop, re-oscillation detection interrupt and watchdog timer interrupt
in the interrupt processing program. By writing “0” in the program, this bit becomes “0”. (Even when “1” is
written in the program, no change is identified for the bit. Also, this bit is not set to “0” where there occur
oscillation stop, re-oscillation detection interrupt.) When the CM22 bit is “1”, no oscillation stop, re-
oscillation detection interrupt occur even if oscillation stop or re-oscillation is detected.
Note 5: Read the CM23 bit in an oscillation stop, re-oscillation detection interrupt handling routine to determine
the main clock status.
Note 6: Effective when the CM07 bit of CM0 register is “0”.
Note 7: When the PM21 bit of PM2 register is “1” (clock modification disabled), writing to the CM20 bit has no
effect.
Note 8: Set the CM20 bit to “0” (disable) before entering stop mode. After exiting stop mode, set the CM20 bit
back to “1” (enable).
Note 9: Set the CM20 bit to “0” (disable) before setting the CM05 bit of CM0 register.
Note 10: The CM20, CM21 and CM27 bits do not change at oscillation stop detection reset.
Figure 1.7.4. CM2 Register
Rev.5.01 Dec 10, 2009 page 31 of 201
REJ03B0014-0501