M16C6S_09 Datasheet, PDF (52/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Interrupts
Interrupt Control
The following describes how to enable/disable the maskable interrupts, and how to set the priority in which
order they are accepted. What is explained here does not apply to nonmaskable interrupts.
Use the FLG register’s I flag, IPL, and each interrupt control register’s ILVL2 to ILVL0 bits to enable/disable
the maskable interrupts. Whether an interrupt is requested is indicated by the IR bit in each interrupt control
register.
Figure 1.9.3 shows the interrupt control registers.
Rev.5.01 Dec 10, 2009 page 52 of 201
REJ03B0014-0501