M16C6S_09 Datasheet, PDF (78/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Timers
Timers
Five 16-bit timers, each capable of operating independently of the others. The count source for each timer
acts as a clock, to control such timer operations as counting, reloading, etc. Figures 1.12.1 show block
diagrams of timer A.
• Main clock
f1
• On-chip oscillator
clock
f2 PCLK0 bit = 0
1/2
f1 or f2
PCLK0 bit = 1
1/8
f8
1/4
f32
TA0IN
TA1IN
TA2IN
TA3IN
TA4IN
f1 or f2 f8 f32 fC32
TCK1 to TCK0
00
01
10
11
Noise
filter
00: Timer mode
10: One-shot timer mode
11: PWM mode
10
TMOD1 to TMOD0
Timer A0
00
01: Event counter mode
11 TA0TGH to TA0TGL
TCK1 to TCK0
00
01
10
11
Noise
filter
00: Timer mode
10: One-shot tiemr mode
11: PWM mode
TMOD1 to TMOD0
10
Timer A1
00
01: Event counter mode
11 TA1TGH to TA1TGL
TCK1 to TCK0
00
01
10
11
Noise
filter
TCK1 to TCK0
00
01
10
11
Noise
filter
00: Timer mode
10: One-shot timer mode
11: PWM mode
10
TMOD1 to TMOD0
Timer A2
00
01: Event counter mode
11 TA2TGH to TA2TGL
00: Timer mode
10: One-shot timer mode
11: PWM mode
10
TMOD1 to TMOD0
Timer A3
00
01: Event counter mode
11 ^{TA3TGH to TA3TGL}
TCK1 to TCK0
00
01
10
11
Noise
filter
00: Timer mode
10: One-shot timer mode
11: PWM mode
10
TMOD1 to TMOD0
Timer A4
00
01: Event counter mode
11 TA4TGH to TA4TGL
Timer A0 interrupt
Timer A1 interrupt
Timer A2 interrupt
Timer A3 interrupt
Timer A4 interrupt
TCK1 to TCK0, TMOD1 to TMOD0 : Bits in TAiMR register (i=0 to 4)
TAiGH to TAiGL: Bits in ONSF register and TRGSR register
NOTES :
1. Be aware that TA0IN shares the pin with RXD2.
Figure 1.12.1. Timer A Configuration
Rev.5.01 Dec 10, 2009 page 78 of 201
REJ03B0014-0501