M16C6S_09 Datasheet, PDF (10/208 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Memory
Memory
Figure 1.2.1 is a memory map of the M16C/6S group. The address space extends the 1M bytes from
address 0000016 to FFFFF16.
The internal ROM is allocated in a lower address direction beginning with address FFFFF16. For example,
a 96-Kbyte internal ROM is allocated to the addresses from E800016 to FFFFF16.
The fixed interrupt vector table is allocated to the addresses from FFFDC16 to FFFFF16. Therefore, store
the start address of each interrupt routine here.
The internal RAM is allocated in an upper address direction beginning with address 0040016. For example,
a 24-Kbytes internal RAM is allocated to the addresses from 0040016 to 063FF16. In addition to storing
data, the internal RAM also stores the stack used when calling subroutines and when interrupts are gener-
ated.
The SRF is allocated to the addresses from 0000016 to 003FF16. Peripheral function control registers are
located here. Of the SFR, any area which has no functions allocated is reserved for future use and cannot
be used by users.
The special page vector table is allocated to the addresses from FFE0016 to FFFDB16. This vector is used
by the JMPS or JSRS instruction. For details, refer to the “M16C/60 and M16C/20 Series Software Manual.”
0000016
0040016
Internal RAM
Size
Address XXXXX16
24K bytes
063FF16
Internal ROM
Size
Address YYYYY16
64K bytes
F000016
96K bytes
E800016
XXXXX16
SFR
Internal RAM
Can not Use
YYYYY16
Internal ROM
FFFFF16
Note 1: Shown here is a memory map for the case where the PM13 bit
in the PM1 register is “1”.
Figure 1.2.1. Memory Map
FFE0016
Special page
vector table
FFFDC16
FFFFF16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
Reserved
Reset
Rev.5.01 Dec 10, 2009 page 10 of 201
REJ03B0014-0501