MC68HC705MC4 Datasheet, PDF (84/99 Pages) Motorola, Inc – Microcontrollers

MC68HC705MC4 Specification Rev. 1.5
This read/write bit enables SCI interrupt requests when the TC bit becomes
set. Reset clears the TCIE bit
1 = TC interrupt requests enabled
0 = TC interrupt requests disabled
RIE — Receive Interrupt Enable
This read/write bit enables SCI interrupt requests when the RDRF bit or the OR
bit becomes set. Reset clears the RIE bit.
1 = RDRF interrup requests enabled
0 = RDRF interrupt requests disabled
ILIE — Idle Line Interrupt Enable
This read/write bit enables SCI interrpt requests when the IDLE bit becomes
set. Reset clears the ILIE bit.
1 = IDLE interrupt requests enabled
0 = IDLE interrupt requests disabled
TE — Transmit Enable
Setting this read/write bit begins the transmission by sending a preamble of 10
or 11 logic ones from the transmit shift register to the PB4/TDO pin. Reset
clears the TE bit.
1 = Transmission enabled
0 = Transmission disabled
RE — Receive Enable
Setting this read/write bit enables the receiver. Clearing the RE bit disables the
receiver and receiver interrupts but does not affect the receiver interrupt flags.
Reset clears the RE bit.
1 = Receiver enabled
0 = Receiver disabled
RWU — Receiver Wakeup Enable
This read/write bit puts the receiver in a standby state. Typically, data
transmitted to the receiver clears the RWU bit and returns the receiver to
normal operation. The WAKE bit in SCCR1 determines whether an idle input or
an address mark brings the receiver out of the standby state. Reset clears the
RWU bit.
1 = Standby state
0 = Normal operation
SBK — Send Break
Setting this read/write bit continuously transmits break codes in the form of
10-bit or 11-bit groups of logic zeros. Clearing the SBK bit stops the break
codes and transmits a logic one as a start bit. Reset clears the SBK bit.
1 = Break codes being transmitted
0 = No break codes being transmitted
Section 10: Serial Communications Interface
MOTOROLA
Page 75