MC68HC705MC4 Datasheet, PDF (62/99 Pages) Motorola, Inc – Microcontrollers

MC68HC705MC4 Specification Rev. 1.5
SECTION 9
PULSE WIDTH MODULATOR
The pulse width modulator (PWM) subsystem has two 8-bit channels (PWMA and
PWMB). The PWM has a programmable prescaler, divide by 1.5 added to the initial
prescaler, polarity, and mux enable with channel masking for motor control applications.
The PWM is capable of generating signals from 0% to 100% duty cycle. A $00 in either
PWM Data Register yields an “off” output (0%) with the polarity control bit set to one for
that channel (i.e. PWMA or PWMB), but a $FF yields a duty of 255/256. To achieve the
100% duty (“ON” output), the polarity control bit is set to zero for that channel (i.e. PWMA
or PWMB) while the data register has $00.
.
PWM CONTROL REGISTER A
BUFFER
PWM DATA A
MODULUS &
COMPARATOR A
to enable
÷ 1.5
Circuit
CLOCK
OSC1 _GENERATOR
(6 MHz)
÷ 1.5
Circuit
to enable
8-BIT COUNTER
8-BIT COUNTER
MODULUS &
COMPARATOR B
BUFFER
PWM DATA B
MUX &
PORT
LOGIC
MUX &
PORT
LOGIC
PWM CONTROL REGISTER B
Figure 9-1: PWM Block Diagram
PA1
PA3
PA5
PA2
PA4
PA6
Section 9: Pulse Width Modulator
MOTOROLA
Page 53