MC68HC705MC4 Datasheet, PDF (1/99 Pages) Motorola, Inc – Microcontrollers

HC705MC4GRS/D
REV 1.5
68HC705MC4
SPECIFICATION
(General Release)
© January 17, 1995
CSIC System Design Group
Austin, Texas
The MC68HC705MC4 is an MCU device in a 28-pin DIP or SOIC package
with the HC05 CPU core, a 16-bit timer including an output compare and two
input captures, an 8-bit A/D converter with a 6 channel input multiplexer, a
dual channel pulse width modulator (PWM), an SCI and a COP watchdog
timer. The 4 K byte memory map has 3584 bytes of user ROM/EPROM and
176 bytes of RAM.
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with such unintended or unauthorized use, even if such claim alleges that Motorola was
negligent regarding the design or manufacture of the part.