MC68HC705MC4 Datasheet, PDF (41/99 Pages) Motorola, Inc – Microcontrollers

MC68HC705MC4 Specification Rev. 1.5
Register
Timer MSB
ADDR
$0020
Timer LSB
$0021
Alternate Counter MSB
$0022
Alternate Counter LSB
$0023
A/D Converter Data Register $0024
A/D Control/Status Register $0025
EPROM Prog Register **
$0026
PWM Force Register
$0027
UNIMPLEMENTED $0028-$002F
R/W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
7
6
5
4
3
2
1
0
TMRH7 TMRH6 TMRH5 TMRH4 TMRH3 TMRH2 TMRH1 TMRH0
TMRL7 TMRL6 TMRL5 TMRL4 TMRL3 TMRL2 TMRL1 TMRL0
ACRH7 ACRH6 ACRH5 ACRH4 ACRH3 ACRH2 ACRH1 ACRH0
ACRL7 ACRL6 ACRL5 ACRL4 ACRL3 ACRL2 ACRL1 ACRL0
AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
COCO ADRC ADON 0
CH3 CH2 CH1 CH0
0
0
0
0
0
0 LATCH EPGM
ForceA ForceB
** EPROM device only, UNIMPLEMENTED on ROM device
Figure 5-5: I/O and Control Registers $0020-$002F
5.4 RAM
The user RAM consists of 176 bytes (including the stack) at locations $0050 thru $00FF.
The stack begins at address $00FF. The stack pointer can access 64 bytes of RAM from
$00FF to $00C0.
NOTE: Using the stack area for data storage or temporary work locations
requires care to prevent it from being overwritten due to stacking from an
interrupt or subroutine call.
5.5 ROM/EPROM
There are 3584 bytes of user ROM/EPROM at locations $0100 thru $0EFF and 16
additional bytes for user vectors at locations $0FF0 thru $0FFF. The
Self-Check/Bootstrap ROM and vectors are at locations $0F00 thru $0FEF.
MOTOROLA
Page 32
Section 5: Memory