MC68HC705MC4 Datasheet, PDF (79/99 Pages) Motorola, Inc – Microcontrollers

MC68HC705MC4 Specification Rev. 1.5
When the shift register is not transmitting a character, the PB4/TDO pin goes to the idle
condition, logic one. If software clears the TE bit during the idle condition, and while TDRE
is set, the transmitter relinquishes control of the PB4/TDO pin.
10.4.1.3 Break Characters
Writing a logic one to the SBK bit in SCCR2 loads the shift register with a break character.
A break character contains all logic zeros and has no start and stop bits. Break character
length depends on the M bit in SCCR1. As long as SBK is at logic one, transmitter logic
continuously loads break characters into the shift register. After software clears the SBK
bit, the shift register finishes transmitting the last break character and then transmits at
least one logic one. The automatic logic one at the end of a break character is to
guarantee the recognition of the start bit of the next character.
10.4.1.4 Idle Characters
An idle character contains all logic ones and has no start or stop bits. Idle character length
depends on the M bit in SCCR1. The preamble is a synchronizing idle character that
begins every transmission.
Clearing the TE bit during a transmission relinquishes the PB4/TDO pin after the last
character to be transmitted is shifted out. The last character may already be in the shift
register, or waiting in the SCDR, or a break character generated by writing to the SBK bit.
Toggling TE from logic zero to logic one while the last character is in transmission
generates an idle character (a preamble) that allows the receiver to maintain control of the
PB4/TDO pin.
10.4.1.5 Transmitter Interrupts
The following sources can generate SCI transmitter interrupt requests:
• Transmit Data Register Empty (TDRE) — The TDRE bit in the SCSR
indicates that the SCDR has transferred a character to the transmit shift
register. TDRE is a source of SCI interrupt requests. The transmission
complete interrupt enable bit (TCIE) in SCCR2 is the local mask for
TDRE interrupts.
• Transmission Complete (TC) — The TC bit in the SCSR indicates that
both the transmit shift register and the SCDR are empty and that no
break or idle character has been generated. TC is a source of SCI
interrupt requests. The transmission complete interrupt enable bit
(TCIE) in SCCR2 is the local mask for TC interrupts.
10.4.2 RECEIVER
Figure 10-3: SCI Receiver shows the structure of the SCI receiver.
MOTOROLA
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Section 10: Serial Communications Interface