MC68HC705MC4 Datasheet, PDF (22/99 Pages) Motorola, Inc – Microcontrollers

MC68HC705MC4 Specification Rev. 1.5
2.3 SELF-CHECK
The MC68HC05MC4 self-check operating mode will be defined in a subsequent revision
of this specification.
2.4 LOW-POWER MODES
MC68HC705MC4 is capable of running in a low-power mode in each of its configurations.
The WAIT and STOP instructions provide two modes that reduce the power required for
the MCU by stopping various internal clocks and/or the on-chip oscillator. The STOP and
WAIT instructions are not normally used if the COP Watchdog Timer is enabled. If the
Stop Instruction is disabled, unintentional or otherwise execution of a STOP instruction
will have no effect. The flow of the Stop and Wait modes is shown in Figure 2-7:
STOP/WAIT Flowcharts.
NOTE: STOP is always disabled in the MC68HC705MC4.
2.4.1 STOP INSTRUCTION
The STOP instruction can result in one of two modes of operation depending on the Mask
Option. If the Stop disable option is not chosen, the STOP instruction will behave like a
normal STOP instruction in the MC68HC05 family and place the MCU in the Stop Mode.
If the STOP disable option is chosen, the STOP instruction will be treated as a NOP
instruction and will have no effect.
2.4.1.1 Stop Mode
Execution of the STOP instruction when enabled places the MCU in its lowest power
consumption mode. In the Stop Mode, the internal oscillator is turned off, halting all
internal processing, including the COP watchdog timer. Execution of the STOP instruction
automatically clears the interrupt mask bit (I-bit) in the Condition Code Register so that
the IRQ external interrupt is enabled. All other registers and memory remain unaltered. All
input/output lines remain unchanged.
The MCU can be brought out of the Stop Mode only by an IRQ external interrupt or an
externally generated RESET. When exiting the Stop Mode the internal oscillator will
resume after a 4064 bus clock cycle oscillator stabilization delay.
NOTE: If the IRQ mask bit (IRQM) in the Interrupt Control and Status Register
is set before entering STOP mode, an active edge on IRQ will not bring
the processor out of STOP.
Section 2: Operating Modes
MOTOROLA
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