MC68HC705MC4 Datasheet, PDF (37/99 Pages) Motorola, Inc – Microcontrollers

MC68HC705MC4 Specification Rev. 1.5
$0000
$002F
$0030
$004F
$0050
$00BF
$00C0
$00FF
$0100
I/O
48 Bytes
Unused
Internal RAM
176 Bytes
Stack
64 Bytes
$0000
I/O Registers
See Figure 5-2:
$002F
User EPROM/ ROM
3584 Bytes
$0EFF
$0F00
$0FEF
$0FF0
$0FFF
Self-Check/
Bootstrap ROM
and Vectors
240 Bytes
User Vectors
EPROM/ROM
16 Bytes
CTimer Vector (High Byte) /
COP Control Register
CTimer Vector (Low Byte)
SCI Vector (High Byte)
SCI Vector (Low Byte)
Timer Vector 1(High Byte)
Timer Vector 1(Low Byte)
Timer Vector 2(High Byte)
Timer Vector 2(Low Byte)
Timer Vector 3(High Byte)
Timer Vector 3(Low Byte)
IRQ Vector (High Byte)
IRQ Vector (Low Byte)
SWI Vector (High Byte)
SWI Vector (Low Byte)
Reset Vector (High Byte)
Reset Vector (Low Byte)
$0FF0
$0FF1
$0FF2
$0FF3
$0FF4
$0FF5
$0FF6
$0FF7
$0FF8
$0FF9
$0FFA
$0FFB
$0FFC
$0FFD
$0FFE
$0FFF
Figure 5-1: User Mode Memory Map
5.2 BOOTSTRAP/SELF-CHECK MODE MEMORY MAP
Memory space is identical to the User Mode, as shown in Figure 5-1: User Mode
Memory Map.
5.3 I/O AND CONTROL REGISTERS
Figure 5-2: through Figure 5-5: briefly describe the I/O and Control Registers at locations
$0000-$002F. Reading unimplemented bits will return unknown states, and writing
unimplemented bits will be ignored.
MOTOROLA
Page 28
Section 5: Memory