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MC68HC705MC4 Datasheet, PDF (24/99 Pages) Motorola, Inc – Microcontrollers 
MC68HC705MC4 Specification Rev. 1.5
STOP
Stop
Disable Mask Y
Option?
N
Stop External Oscillator,
Stop Internal Timer Clock,
Reset Start-up Delay
Fetch and Process Next
Instruction
WAIT
External Oscillator Active
and
Internal Timer Clock Active
Stop Internal Processor Clock,
Clear I-Bit in CCR
Stop Internal Processor Clock,
Clear I-Bit in CCR
External
RESET?
N
IRQ
External
Interrupt?
N
Y
Y
Restart External Oscillator,
start Stabilization Delay
End
of Stabilization Y
Delay?
N
Restart
Internal Processor Clock
1. Fetch Reset Vector
or
2. Service Interrupt
a. Stack
b. Set I-Bit
c. Vector to Interrupt Routine
Y
External
RESET?
N
COP
Y
Internal
Interrupt?
N
IRQ
Y
External
Interrupt?
N
TIMER
Y
Internal
RESET?
N
SCI
Y
Internal
RESET?
N
Y Core TIMER
Internal
Interrupt?
N
Figure 2-7: STOP/WAIT Flowcharts
2.5 COP WATCHDOG TIMER CONSIDERATIONS
The COP watchdog timer is active in single chip mode of operation when selected by
Mask Option. Executing the STOP instruction when Stop mode is enabled (via Mask
Option) will cause the COP to be disabled. Therefore, it is recommended that if the COP
watchdog timer is to be used, the Stop mode should be disabled by selecting the
appropriate Mask Option.
Section 2: Operating Modes
MOTOROLA
Page 15